参数资料
型号: C8051F310DK-K
厂商: Silicon Laboratories Inc
文件页数: 7/13页
文件大小: 0K
描述: DEV KIT FOR C8051F310/F311
标准包装: 1
C8051F31x
4.1. System Clock Sources
The C8051F310 device installed on the target board features a calibrated programmable internal oscillator which is
enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of
3.0625 MHz (±2%) by default but may be configured by software to operate at other frequencies. Therefore, in many
applications an external oscillator is not required. However, if you wish to operate the C8051F310 device at a fre-
quency not available with the internal oscillator, an external crystal may be used. Refer to the C8051F31x data sheet
for more information on configuring the system clock source.
The target board is designed to facilitate the installation of an external crystal. Remove shorting blocks at headers
J9 and J10 and install the crystal at the pads marked Y1. Install a 10 M ? resistor at R9 and install capacitors at
C14 and C15 using values appropriate for the crystal you select. Refer to the C8051F31x data sheet for more infor-
mation on the use of external oscillators.
4.2. Switches and LEDs
Two switches are provided on the target board. Switch SW1 is connected to the RESET pin of the C8051F310.
Pressing SW1 puts the device into its hardware-reset state. Switch SW2 is connected to the C8051F310’s general
purpose I/O (GPIO) pin through headers. Pressing SW2 generates a logic low signal on the port pin. Remove the
shorting block from the header to disconnect SW2 from the port pins. The port pin signal is also routed to a pin on
the J1 I/O connector. See Table 1 for the port pins and headers corresponding to each switch.
Two LEDs are also provided on the target board. The red LED labeled PWR is used to indicate a power connection
to the target board. The green LED labeled with a port pin name is connected to the C8051F310’s GPIO pin
through headers. Remove the shorting block from the header to disconnect the LED from the port pin. The port pin
signal is also routed to a pin on the J1 I/O connector. See Table 1 for the port pins and headers corresponding to
each LED.
Table 1. Target Board I/O Descriptions
Description
SW1
SW2
Green LED
Red LED
I/O
Reset
P0.7
P3.3
PWR
Rev. 0.7
Header
none
J3[3-4]
J3[1-2]
none
7
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C8051F310GQ 制造商:SILICONLABS 功能描述:
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