参数资料
型号: C9530CT
英文描述: ST7262 - LOW SPEED USB 8-BIT MCU WITH 3 ENDPOINTS, FLASH OR ROM MEMORY, LVD, WDG, 10-BIT ADC, 2 TIMERS, SCI, SPI
中文描述: CPU系统时钟发生器|的CMOS | TSSOP封装| 48PIN |塑料
文件页数: 7/14页
文件大小: 180K
代理商: C9530CT
PCIX I/O System Clock Generator With EMI Control Features
Cypress Semiconductor Corporation
525 Los Coches St.
Milpitas, CA 95035. Tel: 408-263-6300, Fax: 408-263-6571
http://www.cypress.com
Document#: 38-07033 Rev. **
5/1/2000
Page 7 of 14
APPROVED PRODUCT
C9530
Output Clock Tri-state Control
All of the clocks in Bank A (CLKA(0:4)) and bank B (CLKB(0:4)) may be placed in a tri-state condition by bringing their
relevant OE pins (OEA and OEB) to a logic low state. This transition to and from a tristate and active condition is a
totally asynchronous event and clock glitching may occur during the transitioning states. This function is intended as a
board level testing feature. When output clocks are being enabled and disabled in active environments the SMBus
control register bits are the preferred mechanism to control these signals in an orderly and predictable manner.
Both output enable pins contain internal pull-up resistors that will insure that a logic 1 (high) is maintained and sensed
by the device if no external circuitry is connected to these pins.
Absolute Maximum Ratings
Maximum Power Supply:
Storage Temperature:
Operating Temperature:
Maximum ESD protection
Maximum Input Voltage Relative to VDD: VDD + 0.3V
Maximum Input Voltage Relative to VSS: VSS - 0.3V
5.5
-65oC to + 150oC
0oC to +70oC
2000V
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
field; however, precautions should be taken to avoid
application of any voltage higher than the maximum
rated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either VSS or VDD)
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