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参数资料
| 型号： | CA3272AM |
| 厂商： | INTERSIL CORP |
| 元件分类： | 外设及接口 |
| 英文描述： | Quad-Gated Inverting Power Drivers with Fault Mode Diagnostic Flag Output |
| 中文描述： | 0.7 A 4 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO28 |
| 封装： | PLASTIC, MS-013AE, SOIC-18 |
| 文件页数： | 6/10页 |
| 文件大小： | 91K |
| 代理商： | CA3272AM |
6
The output will continue to turn on and off for as long as the
shorted condition exists or until shutdown by the input logic.
The resulting frequency and duty cycle of the output current
flow is determined by the ambient temperature, the thermal
resistance of the package in the application and the total
power dissipation in the package. Since each output is inde-
pendently protected, the frequency and duty cycle of the cur-
rent flow into multiple shorted outputs will not be related in
time. Long lead lengths in the load circuit may lead to oscilla-
tory behavior if more than two output loads are shorted.
Since a diagnostic flag indicates when an output is shorted,
this information can be used as input to a microprocessor or
dedicated logic circuit to provide a fast switch-off when a
short occurs and, by sequence action, can be used to deter-
mine which output is shorted. A fault condition in any output
load will cause the FAULT output to switch to a logic “low”.
Since a fault condition may be detected during switching,
use of an appropriate size capacitor to filter the FAULT out-
put is recommended. The recommended FAULT output cir-
cuit is shown in Figure 2. This will prevent the FAULT output
voltage from reaching a logic level “0” within the maximum
switching time.
The FAULT detection circuitry compares the state of the
input and the state of the output for each A, B, C and D
channel. The output is considered to be in a high state if the
voltage exceeds the typical FAULT threshold reference volt-
age, V
THD
of 4V. If the output voltage is less than V
THD
, the
output is considered to be in a low state. For example, if the
input is high and the output is less than V
THD
, a normal
“ON” condition exists and the FAULT output is high. If the
input is high and the output is greater than V
THD
, a shorted
load condition is indicated and the FAULT output is low.
When the input is low and the output is greater than V
THD
, a
normal “OFF” condition is indicated and the FAULT output is
high. If the input is low and the output is less than V
THD
, an
open load condition exists and the FAULT output is low. The
Output Driver Fault Sense state is determined by high and
low comparator threshold limits which are defined in the
Fault Parameters section of the Electrical Specifications.
The FAULT output diagram of Figure 2 shows the circuit
component interface for sensing a diagnostic fault condition.
As noted, the time constant of T
X
= R
X
C
X
should be greater
than the ON-OFF output switching times to avoid false fault
readings during switching. For applications requiring fast
period repetition rates, the maximum time constant should
be significantly less than the period of switching. The short-
est practical time constant is preferred to limit the duration of
a fault condition.
To match a standard CMOS or TTL interface, the switched
current at the FAULT pin must be converted to V
IH
and V
IL
voltage levels using the R
X
external pullup resistor. The min-
imum specified I
OL
limit at the FAULT output defines the Low
(Fault) state which is used to test for a V
OL
maximum limit of
0.4V. This makes the calculation for the V
IL
input level rela-
tively simple. Where V
F
is the FAULT output voltage, V
CC
is
the power supply voltage, R
X
is the pullup resistor to V
CC
from the FAULT pin and I
OL
is the fault condition sink cur-
rent, I
O(SINK)
, the low state equation is:
V
F
= V
CC
- R
X
I
OL
≤
V
IL
(EQ. 1)
As an example: Since TTL is the worst case for a low state,
V
IL
= 0.8V. Using V
CC
= 5V, maximum V
F
= V
OL
= 0.4V and
minimum I
OL
= 1mA for the CA3272A and CA3292A. At the
worst case limit, the minimum value of R
X
is:
R
X
= (V
CC
- V
IL
)/I
OL
= (5 - 0.4)V/0.001mA = 4.6k
The preferred value for R
X
would be greater than the values
calculated.
For the logic V
IH
High (normal state),
V
F
= V
CC
- R
X
I
OH
≥
V
IH
(EQ. 2)
Where the I
OH
current is the specified leakage current,
I
F(LK)
at the FAULT pin, it remains to check the calculated
value for R
X
as a leakage current times the chosen pullup
resistance. To determine that the minimum V
OH
from the
FAULT pin is greater than V
IH
to an external logic match, V
F
is calculated using Equation 2. For example, using the mini-
mum R
X
resistor value calculated for the CA3272A,
V
F
= [5 - (4.6k
x 20
μ
A)] = 4.9V
which is more than suitable for CMOS or TTL Input switching
levels; suggesting that a larger value of R
X
(such as
10k
)
could be used for a better noise margin in the Low fault state.
To detect an open load, each output has an internal low-level
current sink, shown in Figure 3, which acts as a pull-down
under open load fault conditions and is always active. The mag-
nitude of this current plus any leakage associated with the out-
put transistor will always be less than 100
μ
A. (The data sheet
specification for I
CEX
includes this internal low-level sink cur-
rent). The output load resistance must be chosen such that the
voltage at the output will not be less than V
THD
when the I
CEX
sink current flows through it under worse case conditions with
minimum supply voltage. For example, assume a 6.5V mini-
mum driver output supply voltage, a FAULT threshold reference
voltage of V
THD
= 5.5V and an output current sink of
I
CEX
= 100
μ
A. Calculate the maximum load resistance that will
not result in a FAULT output low state when the output is OFF.
I
LIM
T
LIM
ZENER
CLAMP
4V
Z
A
Q
A
0.02
I
O(SINK)
2
OUT A
R
LOAD
V
BATT
FAULT SENSE
THRESHOLD, V
THD
FIGURE 3. OUTPUT OPEN LOAD DETECTION WHERE I
O(SINK)
IS AN ACTIVE CURRENT SINK PULLDOWN FOR
OPEN-LOAD FAULT DETECTION. THE CURRENT
I
CEX
IS I
O(SINK)
PLUS LEAKAGE CURRENTS OF
THE OUTPUT DRIVER
CA3272A, CA3292A
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