参数资料
| 型号： | CAT24C03ZI-GT3 |
| 厂商： | ON Semiconductor |
| 文件页数： | 6/14页 |
| 文件大小： | 0K |
| 描述： | 2KB I2C SER EEPROM |
| 标准包装： | 3,000 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 2K (256 x 8) |
| 速度： | 400kHz |
| 接口： | I²C，2 线串口 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 包装： | 带卷 (TR) |
CAT24C03, CAT24C05
WRITE OPERATIONS
Byte Write
In Byte Write mode, the Master sends the START
condition and the Slave address with the R/W bit set to zero
to the Slave. After the Slave generates an acknowledge, the
Master sends the byte address that is to be written into the
address pointer of the CAT24C03/05. After receiving
another acknowledge from the Slave, the Master transmits
the data byte to be written into the addressed memory
location. The CAT24C03/05 device will acknowledge the
data byte and the Master generates the STOP condition, at
which time the device begins its internal Write cycle to
nonvolatile memory (Figure 6). While this internal cycle is
in progress (t WR ), the SDA output will be tri ? stated and the
CAT24C03/05 will not respond to any request from the
Master device (Figure 7).
Page Write
The CAT24C03/05 writes up to 16 bytes of data in a single
write cycle, using the Page Write operation (Figure 8). The
Page Write operation is initiated in the same manner as the
Byte Write operation, however instead of terminating after
the data byte is transmitted, the Master is allowed to send up
to fifteen additional bytes. After each byte has been
transmitted the CAT24C03/05 will respond with an
acknowledge and internally increments the four low order
address bits. The high order bits that define the page address
remain unchanged. If the Master transmits more than sixteen
bytes prior to sending the STOP condition, the address
counter ‘wraps around’ to the beginning of page and
previously transmitted data will be overwritten. Once all
sixteen bytes are received and the STOP condition has been
sent by the Master, the internal Write cycle begins. At this
point all received data is written to the CAT24C03/05 in a
single write cycle.
Acknowledge Polling
The acknowledge (ACK) polling routine can be used to
take advantage of the typical write cycle time. Once the stop
condition is issued to indicate the end of the host’s write
operation, the CAT24C03/05 initiates the internal write
cycle. The ACK polling can be initiated immediately. This
involves issuing the start condition followed by the slave
address for a write operation. If the CAT24C03/05 is still
busy with the write operation, NoACK will be returned. If
the CAT24C03/05 has completed the internal write
operation, an ACK will be returned and the host can then
proceed with the next read or write operation.
Hardware Write Protection
With the WP pin held HIGH, the upper half of memory is
protected against Write operations. If the WP pin is left
floating or is grounded, it has no impact on the operation of
the CAT24C03/05. The state of the WP pin is strobed on the
last falling edge of SCL immediately preceding the first data
byte (Figure 9). If the WP pin is HIGH during the strobe
interval, the CAT24C03/05 will not acknowledge the data
byte and the Write request will be rejected.
Delivery State
The CAT24C03/05 is shipped erased, i.e., all bytes are
FFh.
BUS ACTIVITY:
MASTER
S
T
A
R
T
SLAVE
ADDRESS
ADDRESS
BYTE
a 7 ÷ a 0
DATA
BYTE
d 7 ÷ d 0
S
T
O
P
S
P
SLAVE
A
C
K
A
C
K
A
C
K
Figure 6. Byte Write Sequence
http://onsemi.com
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相关代理商/技术参数 |
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| CAT24C03ZIT3 | 制造商:CATALYST 制造商全称:Catalyst Semiconductor 功能描述:1-Kb, 2-Kb, 4-Kb, 8-Kb and 16-Kb CMOS Serial EEPROM |
| CAT24C03ZI-T3 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2-Kb and 4-Kb I2C Serial EEPROM with Partial Array Write Protection |
| CAT24C04 | 制造商:CATALYST 制造商全称:Catalyst Semiconductor 功能描述:1-Kb, 2-Kb, 4-Kb, 8-Kb and 16-Kb CMOS Serial EEPROM |
| CAT24C041 | 制造商:CATALYST 制造商全称:Catalyst Semiconductor 功能描述:Supervisory Circuits with I2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog Timer |
| CAT24C041J-25TE13 | 制造商:CATALYST 制造商全称:Catalyst Semiconductor 功能描述:Supervisory Circuits with I2C Serial CMOS E2PROM, Precision Reset Controller and Watchdog Timer |
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