参数资料
| 型号： | CAT25020VI-GT3 |
| 厂商： | ON Semiconductor |
| 文件页数： | 5/18页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 2KBIT 10MHZ 8SOIC |
| 标准包装： | 1 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 2K (256 x 8) |
| 速度： | 20MHz |
| 接口： | SPI 3 线串行 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 标准包装 |
| 其它名称： | CAT25020VI-GT3DKR CAT25020VI-GT3DKR-ND CAT25020VI-GT3OSDKR |
CAT25010, CAT25020, CAT25040
Pin Description
SI: The serial data input pin accepts op ? codes, addresses
and data. In SPI modes (0,0) and (1,1) input data is latched
on the rising edge of the SCK clock input.
SO: The serial data output pin is used to transfer data out of
the device. In SPI modes (0,0) and (1,1) data is shifted out
on the falling edge of the SCK clock.
SCK: The serial clock input pin accepts the clock provided
by the host and used for synchronizing communication
between host and CAT25010/20/40.
CS: The chip select input pi n is used to enable/disable the
CAT25010/20/40. When CS is high, the SO output is
tri ? stated (high impedance) and the device is in Standby
Mode (unless an internal write operation is in progress).
Every communication session between host and
CAT25010/20/40 must be preceded by a high to low transition
and concluded with a low to high transition of the CS input.
Functional Description
The CAT25010/20/40 devices support the Serial
Peripheral Interface (SPI) bus protocol, modes (0,0) and
(1,1). The device contains an 8 ? bit instruction register. The
instruction set and associated op ? codes are listed in Table 9.
Reading data stored in the CAT25010/20/40 is
accomplished by simply providing the READ command and
an address. Writing to the CAT25010/20/40, in addition to
a WRITE command, address and data, also requires
enabling the device for writing by first setting certain bits in
a Status Register, as will be explained later.
After a high to low transition on the CS input pin, the
CAT25010/20/40 will accept any one of the six instruction
op ? codes listed in Table 9 and will ignore all other possible
8 ? bit combinations. The communication protocol follows
the timing from Figure 2.
Table 9. INSTRUCTION SET (Note 13)
WP: The write protect input pin will allow all write
operations to the device when held high. When WP pin is
tied low all write operations are inhibited.
HOLD: The HOLD input pin is used to pause transmission
between host and CAT25010/20/40, without having to
retransmit the entire sequence at a later time. To pause,
HOLD must be taken low and to resume it must be taken
Instruction
WREN
WRDI
RDSR
WRSR
READ
Opcode
0000 0110
0000 0100
0000 0101
0000 0001
0000 X011
Operation
Enable Write Operations
Disable Write Operations
Read Status Register
Write Status Register
Read Data from Memory
back high, with the SCK input low during both transitions.
When not used for pausing, the HOLD input should be tied
to V CC , either directly or through a resistor.
WRITE 0000 X010 Write Data to Memory
13. X = 0 for CAT25010, CAT25020. X = A8 for CAT25040
t CS
CS
t CNH
t CSS
t WH
t WL
t CSH
t CNS
SCK
SI
t SU
t H
VALID
IN
t RI
t FI
t V
t HO
t V
t DIS
SO
HI ? Z
VALID
OUT
HI ? Z
Figure 2. Synchronous Data Timing
Status Register
The Status Register, as shown in Table 10, contains a
number of status and control bits.
The RDY (Ready) bit indicates whether the device is busy
with a write operation. This bit is automatically set to 1 during
an internal write cycle, and reset to 0 when the device is ready
to accept commands. For the host, this bit is read only.
The WEL (Write Enable Latch) bit is set/reset by the
WREN/WRDI commands. When set to 1, the device is in a
Write Enable state and when set to 0, the device is in a Write
Disable state.
The BP0 and BP1 (Block Protect) bits determine which
blocks are currently write protected. They are set by the user
with the WRSR command and are non ? volatile. The user is
allowed to protect a quarter, one half or the entire memory,
by setting these bits according to Table 11. The protected
blocks then become read ? only.
http://onsemi.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CAT25020VI-GT3JN | 功能描述:电可擦除可编程只读存储器 2KB SPI SER CMOS 电可擦除可编程只读存储器 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT25020VP2I-GT3 | 功能描述:电可擦除可编程只读存储器 2K-Bit SPI Serial RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT25020Y | 功能描述:电可擦除可编程只读存储器 (256x8) 2K 2.5-6.0 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT25020Y-1.8 | 功能描述:电可擦除可编程只读存储器 (256x8) 2K 1.8-6.0 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| CAT25020YA | 功能描述:电可擦除可编程只读存储器 (256x8) 2K 2.5-6.0 RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
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