参数资料
型号: CAT28F512TRA-90
厂商: ON SEMICONDUCTOR
元件分类: PROM
英文描述: 64K X 8 FLASH 12V PROM, 90 ns, PDSO32
封装: 8 X 20 MM, REVERSE, TSOP-32
文件页数: 14/15页
文件大小: 427K
代理商: CAT28F512TRA-90
CAT28F512
8
Doc. No. 1084, Rev. H
ADDRESSES
CE (E)
OE (G)
WE (W)
DATA (I/O)
HIGH-Z
POWER UP
STANDBY
DEVICE AND
ADDRESS SELECTION
OUPUTS
ENABLED
DATA VALID
STANDBY
ADDRESS STABLE
OUTPUT VALID
tAVQV (tACC)
tELQX (tLZ)
tGLQX (tOLZ)
tGLQV (tOE)
tELQV (tCE)
tAXQX (tOH)
tGHQZ (tDF)
tEHQZ (tDF)
tAVAV (tRC)
POWER DOWN
HIGH-Z
tWHGL
READ OPERATIONS
Read Mode
A Read operation is performed with both CE and OE low
and with WE high. VPP can be either high or low,
however, if VPP is high, the Set READ command has to
be sent before reading data (see Write Operations). The
data retrieved from the I/O pins reflects the contents of
the memory location corresponding to the state of the 16
address pins. The respective timing waveforms for the
read operation are shown in Figure 3. Refer to the AC
Read characteristics for specific timing parameters.
Signature Mode
The signature mode allows the user to identify the IC
manufacturer and the type of device while the device
resides in the target system. This mode can be activated
in either of two ways; through the conventional method
of applying a high voltage (12V) to address pin A9 or by
sending an instruction to the command register (see
Write Operations).
The conventional mode is entered as a regular READ
mode by driving the CE and OE pins low (with WE high),
and applying the required high voltage on address pin A9
while all other address lines are held at VIL.
A Read cycle from address 0000H retrieves the binary
code for the IC manufacturer on outputs I/O0 to I/O7:
CATALYST Code = 00110001 (31H)
A Read cycle from address 0001H retrieves the binary
code for the device on outputs I/O0 to I/O7.
28F512 Code = 1011 1000 (B8H)
Standby Mode
With CE at a logic-high level, the CAT28F512 is placed
in a standby mode where most of the device circuitry is
disabled, thereby substantially reducing power con-
sumption. The outputs are placed in a high-impedance
state.
Figure 3. A.C. Timing for Read Operation
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