参数资料
型号: CAT28LV256G-25T
厂商: ON Semiconductor
文件页数: 3/12页
文件大小: 0K
描述: IC EEPROM 256KBIT 250NS 32PLCC
产品变化通告: Product Obsolescence 08/Apr/2011
标准包装: 500
格式 - 存储器: EEPROMs - 并行
存储器类型: EEPROM
存储容量: 256K (32K x 8)
速度: 250ns
接口: 并联
电源电压: 3 V ~ 3.6 V
工作温度: 0°C ~ 70°C
封装/外壳: 32-LCC(J 形引线)
供应商设备封装: 32-PLCC(11.43x13.97)
包装: 带卷 (TR)
其它名称: 28LV256G-25T
CAT28LV256
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................. –55 ° C to +125 ° C
Storage Temperature ....................... –65 ° C to +150 ° C
Voltage on Any Pin with
Respect to Ground (2) ........... –2.0V to +V CC + 2.0V
V CC with Respect to Ground ............... –2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25 ° C) ................................... 1.0W
Lead Soldering Temperature (10 secs) ............ 300 ° C
Output Short Circuit Current (3) ........................ 100 mA
RELIABILITY CHARACTERISTICS
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation
of the device at these or any other conditions outside of
those listed in the operational sections of this specifica-
tion is not implied. Exposure to any absolute maximum
rating for extended periods may affect device perfor-
mance and reliability.
Symbol
Parameter
Min.
Max.
Units
Test Method
N END
(1)
Endurance
100,000
Cycles/Byte
MIL-STD-883, Test Method 1033
T DR(1)
Data Retention
100
Years
MIL-STD-883, Test Method 1008
V ZAP
(1)
ESD Susceptibility
2000
Volts
MIL-STD-883, Test Method 3015
I LTH(1)(4)
Latch-Up
100
mA
JEDEC Standard 17
CAPACITANCE T A = 25 ° C, f = 1.0 MHz
Symbol
C I/O(1)
C IN(1)
Test
Input/Output Capacitance
Input Capacitance
Max.
10
6
Units
pF
pF
Conditions
V I/O = 0V
V IN = 0V
MODE SELECTION
Read
Mode
CE
L
WE
H
OE
L
I/O
D OUT
Power
ACTIVE
Byte Write (WE Controlled)
Byte Write (CE Controlled)
L
L
H
H
D IN
D IN
ACTIVE
ACTIVE
Standby, and Write Inhibit
Read and Write Inhibit
H
X
X
H
X
H
High-Z
High-Z
STANDBY
ACTIVE
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is V CC +0.5V, which may overshoot to V CC +2.0V for periods of less than 20 ns.
(3) Output shorted for no more than one second. No more than one output shorted at a time.
(4) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to V CC +1V.
? 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
3
Doc. No. MD-1071, Rev. E
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