参数资料
| 型号： | CAT5259YI-00-T2 |
| 厂商： | ON Semiconductor |
| 文件页数： | 11/15页 |
| 文件大小： | 0K |
| 描述： | IC POT DPP 100K 256TAP 24TSSOP |
| 标准包装： | 2,000 |
| 接片： | 256 |
| 电阻（欧姆）： | 100k |
| 电路数： | 4 |
| 温度系数： | 标准值 300 ppm/°C |
| 存储器类型： | 非易失 |
| 接口： | I²C（设备位址） |
| 电源电压： | 2.5 V ~ 6 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP |
| 包装： | 带卷 (TR) |
CAT5259
http://onsemi.com
5
Table 5. D.C. OPERATING CHARACTERISTICS (VCC = +2.5 V to +6.0 V, unless otherwise specified.)
Symbol
Parameter
Test Conditions
Min
Max
Units
ICC1
Power Supply Current
fSCL = 400 kHz, SDA = Open
VCC = 6 V, Inputs = GND
1
mA
ICC2
Power Supply Current
Non-volatile WRITE
fSCK = 400 kHz, SDA Open
VCC = 6 V, Input = GND
5
mA
ISB
Standby Current (VCC = 5 V)
VIN = GND or VCC, SDA = Open
5
mA
ILI
Input Leakage Current
VIN = GND to VCC
10
mA
ILO
Output Leakage Current
VOUT = GND to VCC
10
mA
VIL
Input Low Voltage
1
VCC x 0.3
V
VIH
Input High Voltage
VCC x 0.7
VCC + 1.0
V
VOL1
Output Low Voltage (VCC = 3 V)
IOL = 3 mA
0.4
V
Table 6. CAPACITANCE (TA = 25C, f = 1.0 MHz, VCC = 5 V)
Symbol
Test
Conditions
Max
Units
Input/Output Capacitance (SDA)
VI/O = 0 V
8
pF
Input Capacitance (A0, A1, A2, A3, SCL, WP)
VIN = 0 V
6
pF
Table 7. A.C. CHARACTERISTICS
Symbol
Parameter
2.5 V 6.0 V
Units
Min
Max
fSCL
Clock Frequency
400
kHz
Noise Suppression Time Constant at SCL, SDA Inputs
200
ns
tAA
SLC Low to SDA Data Out and ACK Out
1
ms
Time the bus must be free before a new transmission can start
1.2
ms
tHD:STA
Start Condition Hold Time
0.6
ms
tLOW
Clock Low Period
1.2
ms
tHIGH
Clock High Period
0.6
ms
tSU:STA
Start Condition SetupTime (for a Repeated Start Condition)
0.6
ms
tHD:DAT
Data in Hold Time
0
ns
tSU:DAT
Data in Setup Time
50
ns
SDA and SCL Rise Time
0.3
ms
SDA and SCL Fall Time
300
ns
tSU:STO
Stop Condition Setup Time
0.6
ms
tDH
Data Out Hold Time
100
ns
Table 8. POWER UP TIMING (Notes 8, 9)
Symbol
Parameter
Max
Units
tPUR
Power-up to Read Operation
1
ms
tPUW
Power-up to Write Operation
1
ms
8. This parameter is tested initially and after a design or process change that affects the parameter.
9. tPUR and tPUW are delays required from the time VCC is stable until the specified operation can be initiated.
Table 9. WIPER TIMING
Symbol
Parameter
Min
Max
Units
tWRPO
Wiper Response Time After Power Supply Stable
5
10
ms
tWRL
Wiper Response Time After Instruction Issued
5
10
ms
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