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参数资料
| 型号： | CAT6219VP5330GT4 |
| 厂商： | ON Semiconductor |
| 文件页数： | 2/11页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 3.3V .5A 6TDFN |
| 标准包装： | 4,000 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 3.3V |
| 输入电压： | 最高 5.5V |
| 电压 - 压降（标准）： | 0.3V @ 500mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 500mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 6-WDFN 裸露焊盘 |
| 供应商设备封装： | 6-TDFN（2x2） |
| 包装： | 带卷 (TR) |
CAT6219
V IN
2.3 V
to 5.5 V
C IN
1 m F
VIN VOUT
CAT6219
V OUT
C OUT
2.2 m F
V IN
2.3 V
to 5.5 V
C IN
1 m F
VIN VOUT
CAT6219
C OUT
2.2 m F
R 1
V OUT
1 ) 1
V OUT + 1.24 V
OFF
ON
EN
BYP
GND
C BYP (Optional)
10 nF
OFF ON
R
R 2
EN
GND
ADJ
R 2
Figure 1. Typical Application Circuit
Table 1. PIN DESCRIPTIONS
Name Function
VIN Supply voltage input.
GND Ground reference.
Figure 2. Adjustable Output LDO
EN is the enable control logic (active high) for the regulator
output. It has a 2.5 M W pull ? down resistor, which assures
that if EN pin is left open, the circuit is disabled.
VOUT is the LDO regulator output. A small 2.2 m F ceramic
bypass capacitor is required between the VOUT pin and
EN
BYP
ADJ
VOUT
Enable input (active high); a 2.5 M W pull ? down
resistor is provided.
Optional bypass capacitor connection for noise
reduction and PSRR enhancing.
Adjustable input. Feedback pin connected to
resistor divider.
LDO Output Voltage.
ground. For better transient response, its value can be
increased to 4.7 m F.
The capacitor should be located near the device. For the
SOT23-5 package, a continuous 500 mA output current may
turn-on the thermal protection. A 250 W internal shutdown
switch discharges the output capacitor in the no-load
condition.
TAB To be connected to the ground plane on PCB
Pin Function
VIN is the supply pin for the LDO. A small 1 m F ceramic
bypass capacitor is required between the V IN pin and ground
near the device. When using longer connections to the power
supply, C IN value can be increased without limit. The
operating input voltage range is from 2.3 V to 5.5 V.
Table 2. ABSOLUTE MAXIMUM RATINGS
GND is the ground reference for the LDO. The pin must be
connected to the ground plane on the PCB.
BYP is the reference bypass pin. An optional 0.01 m F
capacitor can be connected between BYP pin and GND to
reduce the output noise and enhance the PSRR at high
frequency.
ADJ is the adjustable input pin for the adjustable LDO. The
pin is connected to the resistor voltage divider.
Parameter
V IN
V EN , V OUT
Junction Temperature, T J
Power Dissipation, P D
Storage Temperature Range, T S
Lead Temperature (soldering, 5 sec.)
ESD Rating (Human Body Model)
Rating
0 to 6.5
? 0.3 to V IN + 0.3
+150
Internally Limited (Note 1)
? 65 to +150
260
3
Unit
V
V
_ C
mW
_ C
_ C
kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. RECOMMENDED OPERATING CONDITIONS (Note 2)
Parameter
V IN
V EN
Junction Temperature Range, T J
Package Thermal Resistance, θ JA SOT23 ? 5
Package Thermal Resistance, θ JA TDFN ? 6
Range
2.3 to 5.5
0 to V IN
? 40 to +125
235
206
Unit
V
V
_ C
_ C/W
NOTE: Typical application circuit with external components is shown above.
1. The maximum allowable power dissipation at any T A (ambient temperature) is P Dmax = (T Jmax ? T A )/ q JA . Exceeding the maximum allowable
power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown.
2. The device is not guaranteed to work outside its operating rating.
http://onsemi.com
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