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参数资料
| 型号： | CAT706SVI-G |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8 |
| 封装： | 0.150 INCH, HALOGEN FREE AND ROHS COMPLIANT, MS-012, SOIC-8 |
| 文件页数： | 10/12页 |
| 文件大小： | 133K |
| 代理商： | CAT706SVI-G |
CAT705, CAT706, CAT813
http://onsemi.com
7
WATCHDOG TIMER
The CAT705, CAT706, & CAT813 provide a Watchdog
input (WDI). The watchdog timer function controls the
watchdog output (WDO) signal and forces the WDO to be
low (active) when the WDI input does not have a transition
from lowtohigh or hightolow within 1.6 s typical. If a
transition occurs on the WDI input pin prior to the watchdog
timeout, the watchdog timer is restarted. The timing
diagram is shown in Figure 6. The watchdog timer starts as
soon as reset condition becomes inactive.
When the VCC supply drops below the reset threshold, the
WDO output becomes active and goes low independently of
the watchdog timing stage.
Figure 7 below shows a typical implementation of a
watchdog function. Any processor signal that repeats
dependant on the normal operation of the processor or
directed by the software operating on the processor can be
used to strobe the watchdog input. The most reliable is a
dedicated I/O output transitioned by a specific software
instruction.
The watchdog can be disabled by floating (or tristating)
the WDI input (see Figure 8). If the watchdog is disabled the
WDI pin will be pulled low for the first 7/8th’s of the
watchdog period (tWD) and pulled high for the last 1/8th of
the watchdog period. This pulling low of the WDI input and
then high is used to detect an open or tristate condition and
will continue to repeat until the WDI input is driven high or
low.
For most efficient operation of devices with the watchdog
function the WDI input should be held low the majority of
the time and only strobed high as required to reset the
watchdog timer.
(RESET)
(() Are for CAT813 Only)
WDI
+5 V
0 V
+5 V
0 V
+5 V
0 V
+5 V
0 V
Figure 6. Watchdog Timing Diagram
tRS
tWD
tWDSU
tWP
RESET
WDO
RESET EXTERNALLY
TRIGGERED BY MR
PIC
DECODER
ADDRESS
WDI
GND
PFI
CAT705
CAT706
CAT813
Figure 7. Watchdog Timer Circuit
MCLR
mC
VCC
PFO
MR
WDO
RESET/RESET
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CAT706SVI-GT3 | 功能描述:监控电路 Microprocessor Super Circuit RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| CAT706SZGI | 制造商:Rochester Electronics LLC 功能描述: 制造商:Catalyst Semiconductor 功能描述: |
| CAT706SZI-G | 制造商:CATALYST 制造商全称:Catalyst Semiconductor 功能描述:レP Supervisory Circuits |
| CAT706SZI-GT3 | 功能描述:监控电路 MPU SUPR CIRCUIT RoHS:否 制造商:STMicroelectronics 监测电压数: 监测电压: 欠电压阈值: 过电压阈值: 输出类型:Active Low, Open Drain 人工复位:Resettable 监视器:No Watchdog 电池备用开关:No Backup 上电复位延迟（典型值）:10 s 电源电压-最大:5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:UDFN-6 封装:Reel |
| CAT706TVI-G | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:μP Supervisory Circuits |
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