参数资料
| 型号： | CAT93C56YI-GT3 |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/17页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 2KBIT 2MHZ 8TSSOP |
| 标准包装： | 3,000 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 2K（256 x 8 或 128 x 16） |
| 速度： | 2MHz |
| 接口： | Microwire 3 线串行 |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 8-TSSOP |
| 包装： | 带卷 (TR) |
| 其它名称： | 93C56YI-GT3 |
CAT93C56, CAT93C57
Table 6. A.C. CHARACTERISTICS (Note 5) , CAT93C56, Die Rev. G – New Product
(V CC = +1.8V to +5.5V, T A = ? 40 ° C to +125 ° C, unless otherwise specified.)
Limits
Symbol
Parameter
Min
Max
Units
t CSS
t CSH
t DIS
t DIH
t PD1
t PD0
t HZ (Note 6)
t EW
t CSMIN
t SKHI
t SKLOW
t SV
CS Setup Time
CS Hold Time
DI Setup Time
DI Hold Time
Output Delay to 1
Output Delay to 0
Output Delay to High ? Z
Program/Erase Pulse Width
Minimum CS Low Time
Minimum SK High Time
Minimum SK Low Time
Output Delay to Status Valid
50
0
100
100
0.25
0.25
0.25
0.25
0.25
100
5
0.25
ns
ns
ns
ns
m s
m s
ns
ms
m s
m s
m s
m s
SK MAX
Maximum Clock Frequency
DC
2000
kHz
Table 7. A.C. CHARACTERISTICS (Note 5) , CAT93C56/57, Die Rev. E – Mature Product
(CAT93C56 Rev. E ? NOT RECOMMENDED FOR NEW DESIGNS)
Limits
V CC = 1.8 V ? 5.5 V
V CC = 2.5 V ? 5.5 V
V CC = 4.5 V ? 5.5 V
Symbol
Parameter
Min
Max
Min
Max
Min
Max
Units
t CSS
t CSH
t DIS
t DIH
t PD1
t PD0
t HZ
(Note 6)
t EW
t CSMIN
t SKHI
t SKLOW
t SV
CS Setup Time
CS Hold Time
DI Setup Time
DI Hold Time
Output Delay to 1
Output Delay to 0
Output Delay to High ? Z
Program/Erase Pulse Width
Minimum CS Low Time
Minimum SK High Time
Minimum SK Low Time
Output Delay to Status Valid
200
0
400
400
1
1
1
1
1
400
10
1
100
0
200
200
0.5
0.5
0.5
0.5
0.5
200
10
0.5
50
0
100
100
0.25
0.25
0.25
0.25
0.25
100
10
0.25
ns
ns
ns
ns
m s
m s
ns
ms
m s
m s
m s
m s
SK MAX
Maximum Clock Frequency
DC
250
DC
500
DC
1000
kHz
Table 8. POWER ? UP TIMING (Notes 6 and 7)
Symbol
t PUR
t PUW
Power ? up to Read Operation
Power ? up to Write Operation
Parameter
Max
1
1
Units
ms
ms
5. Test conditions according to “A.C. Test Conditions” table.
6. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate
AEC ? Q100 and JEDEC test methods.
7. t PUR and t PUW are the delays required from the time V CC is stable until the specified operation can be initiated.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CAT93C56YI-GT3E | 制造商:CATALYST 制造商全称:Catalyst Semiconductor 功能描述:2K-Bit Microwire Serial EEPROM |
| CAT93C56YIT2 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2-Kb Microwire Serial CMOS EEPROM |
| CAT93C56YI-T2 | 制造商:CATALYST 制造商全称:Catalyst Semiconductor 功能描述:2-Kb Microwire Serial CMOS EEPROM |
| CAT93C56YIT2E | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2-Kb Microwire Serial CMOS EEPROM |
| CAT93C56YIT3 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:2-Kb Microwire Serial CMOS EEPROM |
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