参数资料
型号: CBT3257AD
厂商: NXP Semiconductors N.V.
元件分类: 开关
英文描述: Quad 1-of-2 multiplexer-demultiplexer
中文描述: 四2选1多路复用解复用器
封装: CBT3257ABQ<SOT763-1 (DHVQFN16)|<<http://www.nxp.com/packages/SOT763-1.html<1<Always Pb-free,;CBT3257AD<SOT109-1 (SO16)|<<http://www.nxp.com/packages/SOT109-1.html<1<
文件页数: 8/16页
文件大小: 104K
代理商: CBT3257AD
Rev.3.02
Dec 22, 2006
page 16 of 142
REJ03B0024-0302
4553 Group
FUNCTION BLOCK OPERATIONS
CPU
(1) Arithmetic logic unit (ALU)
The arithmetic logic unit ALU performs 4-bit arithmetic such as 4-
bit data addition, comparison, AND operation, OR operation, and
bit manipulation.
(2) Register A and carry flag
Register A is a 4-bit register used for arithmetic, transfer, ex-
change, and I/O operation.
Carry flag CY is a 1-bit flag that is set to “1” when there is a carry
with the AMC instruction (Figure 1).
It is unchanged with both A n instruction and AM instruction. The value
of A0 is stored in carry flag CY with the RAR instruction (Figure 2).
Carry flag CY can be set to “1” with the SC instruction and cleared
to “0” with the RC instruction.
(3) Registers B and E
Register B is a 4-bit register used for temporary storage of 4-bit
data, and for 8-bit data transfer together with register A.
Register E is an 8-bit register. It can be used for 8-bit data transfer
with register B used as the high-order 4 bits and register A as the
low-order 4 bits (Figure 3).
Register E is undefined after system is released from reset and re-
turned from the power down mode. Accordingly, set the initial value.
(4) Register D
Register D is a 3-bit register.
It is used to store a 7-bit ROM address together with register A and
is used as a pointer within the specified page when the TABP p,
BLA p, or BMLA p instruction is executed (Figure 4).
Also, when the TABP p instruction is executed at UPTF flag = “1”,
the high-order 2 bits of ROM reference data is stored to the low-or-
der 2 bits of register D, the high-order 1 bit of register D is “0”.
When the TABP p instruction is executed at UPTF flag = “0”, the
contents of register D remains unchanged. The UPTF flag is set to
“1” with the SUPT instruction and cleared to “0” with the RUPT in-
struction. The initial value of UPTF flag is “0”.
Register D is undefined after system is released from reset and re-
turned from the power down mode. Accordingly, set the initial value.
Fig. 1 AMC instruction execution example
Fig. 2 RAR instruction execution example
Fig. 3 Registers A, B and register E
Fig. 4 TABP p instruction execution example
(CY)
(M(DP))
(A)
Addition
ALU
<Carry>
<Result>
CY
A3 A2 A1 A0
A0
CYA3 A2 A1
<Rotation>
RAR instruction
<Set>
SC instruction
<Clear>
RC instruction
A3 A2 A1 A0
B3 B2 B1 B0
E7 E6 E5 E4 E3 E2 E1 E0
A3 A2 A1 A0
B3 B2 B1 B0
TAB instruction
TEAB instruction
TABE instruction
TBA instruction
Register BRegister A
Register B
Register A
Register E
Specifying address
TABP p instruction
p6 p5 p4 p3 p2 p1 p0
PCH
DR2 DR1DR0 A3 A2 A1 A0
PCL
Immediate field
value p
The contents of
register D
ROM
84
0
Middle-order 4 bits
Low-order 4bits
Register A (4)
Register B (4)
The contents of
register A
High-order 2 bits
Register D (3)
* UPTF=1, high-order 1 bit of register D is “0”.
UPTF=0, data is not transferred to register D.
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CBT3257AD,118 功能描述:编码器、解码器、复用器和解复用器 QUAD 1OF2 MULTIPLXR/ RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
CBT3257ADB 功能描述:编码器、解码器、复用器和解复用器 QUAD 1OF2 MULTIPLXR/ DEMUX RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
CBT3257ADB,112 功能描述:编码器、解码器、复用器和解复用器 QUAD 1OF2 MULTIPLXR/ RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
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