参数资料
型号: CBTD3306D
厂商: NXP Semiconductors N.V.
元件分类: 开关
英文描述: Dual bus switch with level shifting
中文描述: 双总线电平转换开关
封装: CBTD3306D<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 5, 2005,;CBTD3306D<SOT96-1 (SO8)|<<http://www.nxp.com/packages/SOT96-1.html<1<week 5, 2005
文件页数: 17/17页
文件大小: 140K
代理商: CBTD3306D
CBTD3306
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product Specification
Rev. 5 — 28 April 2011
9 of 17
NXP Semiconductors
CBTD3306
Dual bus switch with level shifting
13. Test information
Test data is given in Table 10.
All input pulses are supplied by generators having the following characteristics: PRR
≤ 10 MHz; Zo =50 Ω.
The outputs are measured one at a time with one transition per measurement.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 13. Test circuit for measuring switching times
VM
tW
10 %
90 %
0 V
VI
negative
pulse
positive
pulse
0 V
VM
90 %
10 %
tf
tr
tf
001aae331
VEXT
VCC
VI
VO
DUT
CL
RT
RL
G
Table 10.
Test data
Supply voltage
Input
Load
VEXT
VI
tr, tf
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
VCC = 5.0 V
± 0.5 V
GND to 3.0 V
≤ 2.5 ns
50 pF
500
Ω
open
7.0 V
open
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