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参数资料
| 型号： | CD4014BCMX |
| 厂商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分类： | 计数移位寄存器 |
| 中文描述： | 4000/14000/40000 SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封装： | 0.150 INCH, MS-012, SOIC-16 |
| 文件页数： | 4/7页 |
| 文件大小： | 73K |
| 代理商： | CD4014BCMX |
www.fairchildsemi.com
4
C
D
40
14BC
AC Electrical Characteristics (Note 5)
TA = 25°C, input tr, tf = 20 ns, CL = 50 pF, RL = 200 k
Note 5: AC Parameters are guaranteed by DC correlated testing.
Note 6: If more than one unit is cascaded trCL should be made less than or equal to the fixed propagation delay of the output of the driving stage for the esti-
mated capacitive load.
Note 7: Setup times are measured with reference to clock and a fixed hold time (tH) as specified.
Note 8: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see 74C family characteristics application note
AN-90.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tPHL, tPLH
Propagation Delay Time
VDD = 5V
200
320
ns
VDD = 10V
80
160
VDD = 15V
60
120
tTHL, tTLH
Transition Time
VDD = 5V
100
200
ns
VDD = 10V
50
100
VDD = 15V
40
80
fCL
Maximum Clock
VDD = 5V
2.8
4
MHz
Input Frequency
VDD = 10V
6
12
VDD = 15V
8
16
tW
Minimum Clock
VDD = 5V
90
180
ns
Pulse Width
VDD = 10V
40
80
VDD = 15V
25
50
trCL, tfCL
Clock Rise and
VDD = 5V
15
s
Fall Time (Note 6)
VDD = 10V
15
VDD = 15V
15
tS
Minimum Set-Up Time
VDD = 5V
60
120
ns
(Note 7) Serial Input
VDD = 10V
40
80
tH ≥ 200 ns
VDD = 15V
30
60
Parallel Inputs
VDD = 5V
80
160
ns
tH ≥ 200 ns
VDD = 10V
40
80
VDD = 15V
30
60
Parallel/Serial Control
VDD = 5V
100
200
ns
tH ≥ 200 ns
VDD = 10V
50
100
VDD = 15V
40
80
tH
Minimum Hold Time
VDD = 5V
0
ns
Serial In, Parallel In, tS ≥ 400 ns VDD = 10V
10
Parallel/Serial Control
VDD = 15V
15
CI
Average Input Capacitance
Any Input
5
7.5
pF
(Note 8)
CPD
Power Dissipation Capacitance
110
pF
(Note 8)
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