参数资料
型号: CD4040MF
元件分类: 通用总线功能
英文描述: Asynchronous Up Counter
中文描述: 异步设立摊位
文件页数: 1/9页
文件大小: 99K
代理商: CD4040MF
2002 Fairchild Semiconductor Corporation
DS005953
www.fairchildsemi.com
October 1987
Revised March 2002
C
C
CD4020BC
CD4040BC
CD4060BC
14-Stage Ripple Carry Binary Counters
12-Stage Ripple Carry Binary Counters
14-Stage Ripple Carry Binary Counters
General Description
The CD4020BC, CD4060BC are 14-stage ripple carry
binary counters, and the CD4040BC is a 12-stage ripple
carry binary counter. The counters are advanced one count
on the negative transition of each clock pulse. The
counters are reset to the zero state by a logical “1” at the
reset input independent of clock.
Features
I
Wide supply voltage range:
I
High noise immunity:
3.0V to 15V
0.45 V
DD
(typ.)
I
Low power TTL compatibility:
or 1 driving 74LS
I
Medium speed operation:
Fan out of 2 driving 74L
8 MHz typ. at V
DD
=
10V
I
Schmitt trigger clock input
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter
X
to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC
CD4020BC
Top View
Pin Assignments for DIP, SOIC and SOP
CD4040BC
Top View
Order Number
CD4020BCM
CD4020BCN
CD4040BCM
CD4040BCSJ
CD4040BCN
CD4060BCM
CD4060BCN
Package Number
M16A
N16E
M16A
M16D
N16E
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
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