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参数资料
| 型号： | CD4046BC |
| 厂商： | National Semiconductor Corporation |
| 英文描述： | Micropower Phase-Locked Loop |
| 中文描述： | 微锁相环 |
| 文件页数： | 1/14页 |
| 文件大小： | 310K |
| 代理商： | CD4046BC |
TLF5968
CD4046BMCD4046BC
Micropower
Phase-Locked
Loop
November 1995
CD4046BMCD4046BC Micropower Phase-Locked Loop
General Description
The CD4046B micropower phase-locked loop (PLL) con-
sists of a low power linear voltage-controlled oscillator
(VCO) a source follower a zener diode and two phase
comparators The two phase comparators have a common
signal input and a common comparator input The signal
input can be directly coupled for a large voltage signal or
capacitively coupled to the self-biasing amplifier at the sig-
nal input for a small voltage signal
Phase comparator I an exclusive OR gate provides a digital
error signal (phase comp I Out) and maintains 90 phase
shifts at the VCO center frequency Between signal input
and comparator input (both at 50% duty cycle) it may lock
onto the signal input frequencies that are close to harmon-
ics of the VCO center frequency
Phase comparator II is an edge-controlled digital memory
network It provides a digital error signal (phase comp II
Out) and lock-in signal (phase pulses) to indicate a locked
condition and maintains a 0 phase shift between signal in-
put and comparator input
The linear voltage-controlled oscillator (VCO) produces an
output signal (VCO Out) whose frequency is determined by
the voltage at the VCOIN input and the capacitor and resis-
tors connected to pin C1A C1B R1 and R2
The source follower output of the VCOIN (demodulator Out)
is used with an external resistor of 10 kX or more
The INHIBIT input when high disables the VCO and source
follower to minimize standby power consumption The zener
diode is provided for power supply regulation if necessary
Features
Y
Wide supply voltage range
30V to 18V
Y
Low dynamic
70 mW (typ) at
power consumption
fo e 10 kHz VDD e 5V
Y
VCO frequency
13 MHz (typ) at VDD e 10V
Y
Low frequency drift
006% CatVDD e 10V
with temperature
Y
High VCO linearity
1% (typ)
Applications
Y
FM demodulator and modulator
Y
Frequency synthesis and multiplication
Y
Frequency discrimination
Y
Data synchronization and conditioning
Y
Voltage-to-frequency conversion
Y
Tone decoding
Y
FSK modulation
Y
Motor speed control
Block
Connection Diagrams
TLF5968 – 1
FIGURE 1
Dual-In-Line Package
TLF5968 – 2
Top View
Order Number CD4046B
C1995 National Semiconductor Corporation
RRD-B30M115Printed in U S A
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CD4046BCM | 功能描述:锁相环 - PLL Phase-Locked Loop RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| CD4046BCMX | 制造商:Fairchild Semiconductor Corporation 功能描述:PLL Single 0.8MHz to 1.6MHz 16-Pin SOIC N T/R |
| CD4046BCN | 功能描述:锁相环 - PLL Phase-Locked Loop RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| CD4046BE | 功能描述:锁相环 - PLL Micropower PLL RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| CD4046BE | 制造商:Texas Instruments 功能描述:Micropower phase locked loop CMOS famil |
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