参数资料
| 型号： | CD74HC4046AE |
| 厂商： | Texas Instruments |
| 文件页数： | 11/34页 |
| 文件大小： | 0K |
| 描述： | IC PLL W/VCO 16-DIP |
| 标准包装： | 25 |
| 系列： | 74HC |
| 类型： | 锁相环路（PLL） |
| PLL： | 是 |
| 输入： | CMOS |
| 输出： | CMOS |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:4 |
| 差分 - 输入:输出： | 无/无 |
| 频率 - 最大： | 38MHz |
| 除法器/乘法器： | 无/无 |
| 电源电压： | 2 V ~ 6 V |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 通孔 |
| 封装/外壳： | 16-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 16-PDIP |
| 包装： | 管件 |
| 产品目录页面： | 964 (CN2011-ZH PDF) |
| 其它名称： | 296-9208-5 |
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19
Application Information
This information is a guide for the approximation of values of
external components to be used with the ’HC4046A and
’HCT4046A in a phase-lock-loop system.
References should be made to Figures 11 through 15 and
Figures 27 through 32 as indicated in the table.
Values of the selected components should be within the
following ranges:
HC/HCT4046A CPD
CHIP SECTION
HC
HCT
UNIT
Comparator 1
48
50
pF
Comparators 2 and 3
39
48
pF
VCO
61
53
pF
R1
Between 3k
and 300k
R2
Between 3k
and 300k
R1 + R2
Parallel Value > 2.7k
C1
Greater Than 40pF
SUBJECT
PHASE
COMPARATOR
DESIGN CONSIDERATIONS
VCO Frequency
Without Extra Offset
PC1, PC2 or PC3
VCO Frequency Characteristic
With R2 =
∞ and R1 within the range 3k < R1 < 300k, the characteristics of the VCO
operation will be as shown in Figures 11 - 15. (Due to R1, C1 time constant a small offset
remains when R2 =
∞.)
PC1
Selection of R1 and C1
Given fo, determine the values of R1 and C1 using Figures 11 - 15
PC2 or PC3
Given fMAX calculate fo as fMAX/2 and determine the values of R1 and C1 using Figures 11 -
15. To obtain 2fL:2fL
≈ 1.2 (V
CC - 1.8V)/(R1C1) where valid range of VCOIN is 1.1V < VCOIN
< VCC - 0.9V
VCO Frequency with
Extra Offset
PC1, PC2 or PC3
VCO Frequency Characteristic
With R1 and R2 within the ranges 3k
< R1 < 300k,3k, < R2 < 300k, the characteristics
of the VCO operation will be as shown in Figures 27 - 32.
PC1, PC2 or PC3
Selection of R1, R2 and C1
Given fo and fL, offset frequency, fMIN, may be calculated from fMIN
≈ f
o - 1.6 fL.
Obtain the values of C1 and R2 by using Figures 27 - 30.
Calculate the values of R1 from Figures 31 - 32.
FIGURE 44. FREQUENCY CHARACTERISTIC OF VCO OPERATING WITHOUT
OFFSET: fo = CENTER FREQUENCY: 2fL = FREQUENCY LOCK RANGE
fMAX
fVCO
fo
fMIN
MIN
1/2 VCC VVCOIN
MAX
2fL
FIGURE 45. FREQUENCY CHARACTERISTIC OF VCO OPERATING WITH OFFSET:
fo = CENTER FREQUENCY: 2fL = FREQUENCY LOCK RANGE
fMAX
fVCO
fo
fMIN
MIN
1/2 VCC
VVCOIN
MAX
2fL
CD54HC4046A, CD74HC4046A, CD54HCT4046A, CD74HCT4046A
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CD74HC4046AE | 制造商:Texas Instruments 功能描述:PHASE LOCK LOOP (PLL) LOGIC IC |
| CD74HC4046AEE4 | 功能描述:锁相环 - PLL Hi-Spd CMOS Logic PLL RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| CD74HC4046AEG4 | 功能描述:IC PLL W/VCO 16-DIP 制造商:texas instruments 系列:74HC 包装:管件 零件状态:在售 类型:锁相环路（PLL） PLL:是 输入:CMOS 输出:CMOS 电路数:1 比率 - 输入:输出:1：4 差分 - 输入:输出:无/无 频率 - 最大值:38MHz 分频器/倍频器:无/无 电压 - 电源:2 V ~ 6 V 工作温度:-55°C ~ 125°C 安装类型:通孔 封装/外壳:16-DIP（0.300"，7.62mm） 供应商器件封装:16-PDIP 基本零件编号:74HC4046 标准包装:25 |
| CD74HC4046AM | 功能描述:锁相环 - PLL PLL w/ VCO RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| CD74HC4046AM | 制造商:Texas Instruments 功能描述:74HC CMOS SMD 74HC4046 SOIC16 |
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