参数资料
| 型号： | CDB150X-01-Z |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 11/16页 |
| 文件大小： | 0K |
| 描述： | DEVELOPMENT BOARD FOR CS1501 |
| 设计资源： | CS150x/160x PCB Layout Guidelines Boost Inductance vs. Inductor Size |
| 特色产品： | CS1501/CS1601 Power Factor Correction IC Controllers |
| 标准包装： | 1 |
| 主要目的： | 电源管理，功率因数校正 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | CS1501 |
| 主要属性： | 400V，90W 输出 |
| 次要属性： | 90 ~ 265 VAC 通用输入 |
| 已供物品： | 板 |
| 其它名称： | 598-1911 |
CS1501
Resistor R IFB sets the feedback current and is calculated as
follows:
MOSFET switching cycle when its drain-source voltage is at
the lowest possible voltage potential, thus reducing switching
losses. The CS1501 uses an auxiliary winding on the PFC
boost inductor to implement zero-voltage switching.
V link – V DD 400V – V DD
R IFB = ----------------------------- = -------------------------------
I ref 129 ? A
[Eq.4]
ZCD
Zero Crossing
Detection
By using digital loop compensation, the voltage feedback
signal does not require an external compensation network.
A current proportional to the AC input voltage is supplied to the
IC on pin IAC and is used by the PFC control algorithm.
V rect
R1
GD ‘ON’
ZCD_below _zero
Figure 19. Zero-voltage Switch
During each switching cycle, when the boost diode current
reaches zero, the boost MOSFET drain-source voltage begins
I AC
R2
R IAC
IA C
3
8
V DD
15k
24k
CS1501
I ref
ADC
oscillating at the resonant frequency of the boost inductor and
MOSFET parasitic output capacitance. The ZCD_below_zero
signal transitions from high to low just prior to a local minimum
of the MOSFET drain-source voltage oscillation. The
zero-crossing detect circuit ensures that a ZCD_below_zero
pulse will only be generated when the comparator output is
Figure 17. IAC Input Pin Model
Resistor R IAC sets the I AC current and is derived as follows:
continuously high for a nominal time period (t ZCB ) of 200ns.
Therefore, any negative edges on the comparator's output
due to spurious glitches will not cause a pulse to be
generated. Due to the CS1501’s variable-frequency control,
the MOSFET switching cycle will not always be initiated at the
R IAC = R IFB
[Eq.5]
first resonant valley.
For optimal performance, resistors R IAC and R IFB should use
1% tolerance or better resistors for best V link voltage accuracy.
5.7 Valley Switching
The external circuitry should be designed so that the current
(I ZCD ) at the ZCD pin is approximately ? 1.0 mA. The table
below depicts approximate values for R3 and R4 for a range
of boost-to-auxiliary inductor turns ratio, N.
The zero-current detection (ZCD) pin is monitored for
demagnetization in the auxiliary winding of the boost inductor
(L B ). The ZCD circuit is designed to detect the V Aux
valley/zero crossings by sensing the voltage transformed onto
the auxiliary winding of L B .
N
9
10
11
12
~R3
46k ?
42k ?
37.5k ?
35.5k ?
~R4
1.75k ?
1.75k ?
1.75k ?
1.75k ?
L B
N:1
D2
V link
13
14
15
32k ?
29.5k ?
27.5k ?
1.75k ?
1.75k ?
1.75k ?
FE T Drain
Table 1. Aux Inductor Turns Ratio vs. R3 and R4
I Aux
R3
CS1501
Resistors R3 and R4 were calculated using V link = 400V and
C p = 10pF.
f c = 1 ? ? 2 ? ? R3 R4 ? C p ?
+
V Aux
I Z CD
R4
ZCD
C p
5
+
V th( Z CD) -
Demag
Comparator
ZCD_below_z ero
Equation 6 is used to calculate the cut-off frequency defined
by the RC circuit at the ZCD pin.
??
[Eq.6]
-
where:
Figure 18. ZCD Input Pin Model
The objective of zero-voltage switching is to initiate each
DS927F4
f c
C p
The cut-off frequency, f c , needs to be 10x the ringing
frequency
Capacitance at the ZCD pin
11
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