参数资料
型号: CDB5378
厂商: Cirrus Logic Inc
文件页数: 10/16页
文件大小: 0K
描述: EVALUATION BOARD FOR CS5378
标准包装: 1
主要目的: 地震评估系统
嵌入式: 是,MCU,8 位
已用 IC / 零件: CS3301A,CS5373A,CS5378
主要属性: 单路数字滤波器
次要属性: 图形用户接口,SPI? 和 USB 接口
已供物品: 板,线缆
相关产品: CS5373A-ISZR-ND - IC DAC/MODULATOR LP/HP 28-SSOP
CS3301-ISZR-ND - IC DIFF AMP PROG LN 24-SSOP
CS3301-ISZ-ND - IC DIFF AMP PROG LN 24-SSOP
CS3301A
μ Controller
CS5373A
or
Differential
CS3301A
CS3302A
CS5378
Configuration
EEPROM
Sensor
M
U
X
AMP
Modulator
Digital Filter
System
Telemetry
Test
DAC
Figure 4. Single-Channel System Architecture
2.1.3
Differential Signals
to ground. A multimeter differentially measuring
Analog signals into and out of the CS3301A are
differential, consisting of two halves with equal but
between SIG+ and SIG- in this example would
properly read 1.767 V rms , or 5 V pp .
opposite magnitude varying about a common mode
voltage.
2.2
2.2.1
Digital Signals
Clock Input
A full scale 5 Vpp differential signal centered on a
-0.15 V common mode can have:
SIG+ = -0.15 V + 1.25 V = 1.1 V
SIG- = -0.15 V - 1.25 V = -1.4 V
SIG+ is +2.5 V relative to SIG-
For the reverse case:
SIG+ = -0.15 V - 1.25 V = -1.4 V
SIG- = -0.15 V + 1.25 V = 1.1 V
The clock signal is used by the chopper-
stabilization circuitry of the amplifier analog in-
puts. The CLK pin can be driven by an external
clock source for synchronous operation, or CLK
can be grounded to run from its own internally gen-
erated clock signal. The CLK pin is connected to a
clock detect circuit which will disable the internal
clock and use an external clock if one is supplied.
If the internal clock signal is to be used, the CLK
pin should be connected to GND.
SIG+ is -2.5 V relative to SIG-
2.2.2
Gain Selection
The total swing for SIG+ relative to SIG- is
(+2.5 V) - (-2.5 V) = 5 V pp . A similar calculation
can be done for SIG- relative to SIG+. Note that a
5 V pp differential signal centered on a -0.15 V
common mode voltage never exceeds 1.1 V and
never drops below -1.4 V on either half of the sig-
nal.
By definition, differential voltages are to be mea-
sured with respect to the opposite half, not relative
10
The CS3301A supports gain ranges of x1, x2, x4,
x8, x16, x32, and x64. They are selected using the
GAIN0, GAIN1, and GAIN2 pins as shown in
2.2.3 Mux Selection
The analog inputs to the amplifier are multiplexed,
with external signals applied to the INA+, INA- or
INB+, INB- pins. An internal termination is also
available for noise tests. Input mux selection is
DS757F1
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