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参数资料
| 型号： | CDB5534U |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 5/43页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR CS5534 |
| 标准包装： | 1 |
| ADC 的数量： | 1 |
| 位数： | 24 |
| 采样率（每秒）： | 3.84k |
| 数据接口： | 串行 |
| 输入范围： | 0 ~ 2.5 V |
| 在以下条件下的电源（标准）： | 35mW @ 5V |
| 工作温度： | -40°C ~ 85°C |
| 已用 IC / 零件： | CS5534 |
| 已供物品： | 板，缆线，CD |
| 相关产品： | CS5534-BSZR-ND - IC ADC 24BIT 4CH W/LNA 24SSOP CS5534-ASZR-ND - IC ADC 24BIT 4CH W/LNA 24-SSOP 598-1116-5-ND - IC ADC 24BIT 4CH W/LNA 24SSOP 598-1115-5-ND - IC ADC 24BIT 4CH W/LNA 20SSOP |
| 其它名称： | 598-1016 |
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CS5531/32/33/34-AS
DS289F5
13
instrumentation amplifier is typically 1200 pA
over
-40°C to +85°C (MCLK=4.9152 MHz).
The common-mode plus signal range of the instru-
mentation amplifier is (VA-) + 0.7 V to (VA+) -
1.7 V.
Figure 4 illustrates the input models for the ampli-
fiers. The dynamic input current for each of the
pins can be determined from the models shown.
Note:
The C=3.9pF and C = 14pF capacitors are
for input current modeling only. For physical
input capacitance see ‘Input Capacitance’
specification under Analog Characteristics.
2.1.1. Analog Input Span
The full-scale input signal that the converter can
digitize is a function of the gain setting and the ref-
erence voltage connected between the VREF+ and
VREF- pins. The full-scale input span of the con-
verter is [(VREF+) - (VREF-)]/(GxA), where G is
the gain of the amplifier and A is 2 for VRS = 0, or
A is 1 for VRS = 1. VRS is the Voltage Reference
Select bit, and must be set according to the differen-
tial voltage applied to the VREF+ and VREF- pins
on the part. See section 2.3.5 for more details.
After reset, the unity gain buffer is engaged. With a
2.5V reference this would make the full-scale input
range default to 2.5 V. By activating the instrumen-
tation amplifier (i.e. a gain setting other than 1) and
using a gain setting of 32, the full-scale input range
can quickly be set to 2.5/32 or about 78 mV. Note
that these input ranges assume the calibration regis-
ters are set to their default values (i.e. Gain = 1.0 and
Offset = 0.0).
2.1.2. Multiplexed Settling Limitations
The settling performance of the CS5531/32/33/34
in multiplexed applications is affected by the sin-
gle-pole, low-pass filter which follows the instru-
mentation amplifier (see Figure 3). To achieve data
sheet settling and linearity specifications, it is rec-
ommended that a 22 nF C0G capacitor be used.
Capacitors as low as 10 nF or X7R type capacitors
can also be used with some minor increase in dis-
tortion for AC signals.
2.1.3. Voltage Noise Density Performance
Figure 5 illustrates the measured voltage noise
density versus frequency from 0.025 Hz to 10 Hz
of a CS5532-AS. The device was powered with
±2.5 V supplies, using 30 Sps OWR, the 64x gain
range, bipolar mode, and with the input short bit
enabled.
AIN
Gain =2, 4,8,16, 32,64
C =3 .9 pF
f=
Gain = 1
AIN
C= 14 pF
φ Coarse
1
φ Fine
1
V
≤ 12 mV
i= fV
C
os
n
V
≤ 8mV
i= fV
C
os
n
MCLK
128
f=
MCLK
16
Figure 4. Input models for AIN+ and AIN- pins
1
10
100
1000
0.025
0.10
1.00
10.00
Frequency (Hz)
Figure 5. Measured Voltage Noise Density, 64x
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| CDB5534U-Z | 功能描述:EVAL BD 24-BIT ADCS W/ULTRALN PG 制造商:cirrus logic inc. 系列:- 零件状态:在售 A/D 转换器数:1 位数:24 采样率（每秒）:3.84k 数据接口:串行 输入范围:±2.5 V 不同条件下的功率（典型值）:35mW @ 3.84kSPS 使用的 IC/零件:CS5534 所含物品:板，电缆 标准包装:1 |
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| CDB5541 | 制造商:Cirrus Logic 功能描述:EVAL BOARD FOR 5540 & 5541 N/A - Bulk 制造商:Cirrus Logic 功能描述:Tools Development kit For Use |
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| CDB5560 | 功能描述:数据转换 IC 开发工具 Eval Bd 50kSps 24Bit Mux ADC RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
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