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| 型号： | CHIPPROG-40 |
| 厂商： | Phyton Inc |
| 文件页数： | 25/182页 |
| 文件大小： | 0K |
| 描述： | PROGRAMMER STANDALONE 40-DIP |
| 产品目录绘图： | CHIPPROG-40 |
| 标准包装： | 1 |
| 类型： | 通用 - 独立 |
| 适用于相关产品： | EEPROM，EPROM，FLASH，MCU，NVRAM |
| 所含物品： | 编程器，线缆，CD，电源适配器 |
| 产品目录页面： | 598 (CN2011-ZH PDF) |
| 相关产品： | AE-TS56-16I-3-ND - ISP CABLEADAPTER 14-PIN HEADER AE-TS48-16-ND - ISP CABLEADAPTER 16-PIN HEADER AE-TS40W-2-ND - ADAPTER SOCKET 40-TSOP TO 40-DIP AE-TS40N-2-ND - ADAPTER SOCKET 40-TSOP TO 40-DIP AE-TS40N-ND - ADAPTER SOCKET 40-TSOP TO 40-DIP AE-TS32N-ND - ADAPTER SOCKET 32-TSOP TO 32-DIP AE-TS28-ND - ADAPTER SOCKET 28-TSOP TO 28-DIP AE-T44-P16-ND - ADAPTER SOCKET 44-QFP TO 40-DIP AE-T44-I51/505-ND - ADAPTER SOCKET 44-QFP TO 40-DIP AE-SS56-16I-ND - ADAPTER SOCKET 56-SSOP TO 40-DIP 更多... |
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Hardware characteristics
Software features
ChipProg Family Brief Description
25
2.5.1
Major features
1.
2.
3.
4.
Has a 14 pin socket for connecting to the target equipment by means of several cable-adapters.
Protects itself and the target equipment against incorrect wiring.
Links to a PC USB 2.0 compatible port, e.g. slower USB connection is also supported.
An unlimited number of ChipProg-ISP tools can be driven from multiple USB ports of one computer (or
via a USB hub) to provide concurrent programming of multiple devices of the same type.
5. Has a button for fast manual launch of any single operation or a batch of operations.
6. Has three LEDs for displaying the programming status (“Good”, “Busy ”, “Error”).
2.5.2
2.5.3
Hardware characteristics
1. Has a standard 14 pin connector.
2. Adapters for programming devices with in-system programming capability.
3. The programmer is built on the base of a very fast and productive 32-bit embedded microcontroller and
FPGA devices. These resources allow adding new targets to the device list by a simple software
update.
4. Most timing-critical parts of the programming algorithms are implemented on the FPGA devices and
do not involve any operations on the embedded microcontroller that would slow down the programming
speed.
5. Implementation in the FPGA devices logical drivers enable outputting logical signals of any level (low,
high, Pullup, Pulldown and external clock generator) to any pin of the programming connector.
6. The tool hardware features 10-bit digital-to-analog converters for accurate settings of the analog
signals.
7. The tool hardware enables accurate programming of the rising and falling edges of the generated
analog signals.
8. The tool hardware automatically adjusts the generated analog signals.
9. The generated analog signals for both the target supplying and programming can be outputted to any
pins of the device being programmed.
10. The tool hardware protects itself and the target device against incorrect connection.
11. The target device pins are protected against the electrostatic discharge.
12. Can be started from the external signal.
13. Three status signals “Good”, “Busy ”, “Error” are outputted to the programmer connector.
14. The self-testing procedure automatically executes at any time the programmer is powered on.
Software features
1. Works under control of Windows 95/98/ME/2000/XP/Vista.
2. Friendly, intuitive graphic user interface.
3. Includes a set of basic commands: Blank Check, Erase, Read, Write, Verify, Lock, Set Configuration
Bits, Data Memory Support, etc., executed by a single mouse click or via menu.
4. Enables programming a batch of the commands above executed one after one by a manual start, by a
mouse click or automatically upon the device insertion into the programming socket.
5. Allows serialization of the programming devices with auto incrementing the device numbers and
storing a serialization log.
6. The program can calculate checksums of the selected data array and then write the checksum into a
specified memory location of the target device. Several methods of the checksum calculation can be
used.
? 2010 Phyton, Inc. Microsystems and Development Tools
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