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| 型号： | CM1234-08DE |
| 厂商： | ON Semiconductor |
| 文件页数： | 2/9页 |
| 文件大小： | 0K |
| 描述： | IC ESD PROTECT ARRAY HS 16TDFN |
| 标准包装： | 3,000 |
| 系列： | PicoGuard® |
| 电压 - 反向隔离（标准值）： | 5V |
| 电压 - 击穿： | 6V |
| 电极标记： | 8 通道阵列 - 双向 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WDFN 裸露焊盘 |
| 供应商设备封装： | 16-WDFN（6x4） |
| 包装： | 带卷 (TR) |
CM1234
Figure 1. Block Diagram
ESD Protection Architecture
Conceptually, an ESD protection device performs the
following actions upon an ESD strike discharge into a
protected ASIC (see Figure 2):
1. When an ESD potential is applied to the system
under test (contact or air ? discharge), Kirchoff ’s
Current Law (KCL) dictates that the Electrical
Overstress (EOS) currents will immediately divide
throughout the circuit, based on the dynamic
impedance of each path.
2. Ideally, the classic shunt ESD clamp will switch
within 1 ns to a low ? impedance path and return
the majority of the EOS current to the chassis
shield/reference ground. In actuality, if the ESD
component’s response time (t CLAMP ) is slower
than the ASIC it is protecting, or if the Dynamic
Clamping Resistance (R DYN ) is not significantly
lower than the ASIC’s I/O cell circuitry, then the
ASIC will have to absorb a large amount of the
EOS energy, and be more likely to fail.
3. Subsequent to the ESD/EOS event, both devices
must immediately return to their original
specifications, and be ready for an additional
strike. Any deterioration in parasitics or clamping
capability should be considered a failure, since it
can then affect signal integrity or subsequent
protection capability. (This is known as
“multi ? strike” capability.)
In the CM1234 architecture, the signal line leading the
connector to the ASIC routes through the CM1234 chip
which provides 100 W matched differential channel
characteristic impedance that helps optimize 100 W load
impedance applications such as the HDMI high speed data
lines.
NOTE: When each of the channels are used individually
for single ? ended signal lines protection, the
individual channel provides 50 W characteristic
impedance matching.
The load impedance matching feature of the CM1234
helps to simplify system designer ’s PCB layout
considerations in impedance matching and also eliminates
associated passive components.
The route through the architecture enables the CM1234 to
provide matched impedance for the signal path between the
connector and the ASIC. Besides this function, this circuit
arrangement also changes the way the parasitic inductance
interacts with the ESD protection circuit and helps reduce
the I RESIDUAL current to the ASIC.
Figure 2. Standard ESD Protection Device Block
Diagram
http://onsemi.com
2
相关PDF资料 |
PDF描述 |
|---|---|
| CM1235-08DE | DIODE ESD CLAMP ARRAY 8CH 16WDFN |
| CM1236-08DE | ARRAY ESD PROT HI SPD 8CH 16TDFN |
| CM1241-04D4 | IC ESD PROT ARRAY ESD LOCAP 8DFN |
| CM1242-07CP | IC ESD PROTECTION 1CH 2WLCSP |
| CM1242-33CP | IC ESD PROTECTION 1CH 2WLCSP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CM1235 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:Small Footprint PicoGuard XS? ESD Clamp Array For High Speed Data Line Protection |
| CM1235-08DE | 功能描述:ESD 抑制器 4 CH ESD 8kV RoHS:否 制造商:STMicroelectronics 通道:8 Channels 击穿电压:8 V 电容:45 pF 端接类型:SMD/SMT 封装 / 箱体:uQFN-16 功率耗散 Pd: 工作温度范围:- 40 C to + 85 C |
| CM1236 | 制造商:ONSEMI 制造商全称:ON Semiconductor 功能描述:PicoGuard XS?? ESD Clamp Array For High Speed Data Line Protection |
| CM1236-08DE | 功能描述:ESD 抑制器 4 CH ESD 8kV RoHS:否 制造商:STMicroelectronics 通道:8 Channels 击穿电压:8 V 电容:45 pF 端接类型:SMD/SMT 封装 / 箱体:uQFN-16 功率耗散 Pd: 工作温度范围:- 40 C to + 85 C |
| CM1238-08DE | 功能描述:ESD 抑制器 8 CH. ESD PROTECTION RoHS:否 制造商:STMicroelectronics 通道:8 Channels 击穿电压:8 V 电容:45 pF 端接类型:SMD/SMT 封装 / 箱体:uQFN-16 功率耗散 Pd: 工作温度范围:- 40 C to + 85 C |
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