参数资料
型号: CM2006-02QR
厂商: ON Semiconductor
文件页数: 2/6页
文件大小: 0K
描述: IC VGA PORT COMPANION MON 16QSOP
标准包装: 2,500
系列: Praetorian®
应用: 监控器,电视
电源电压: 5V
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 带卷 (TR)
安装类型: 表面贴装
其它名称: CM2006-02QR-ND
CM2006-02QROSTR
CM2006
http://onsemi.com
2
ELECTRICAL SCHEMATIC
VIDEO_1
VIDEO_2
VIDEO_3
GND
SYNC_OUT2
GND
VCC_DDC
VCC
SYNC_OUT1
SYNC_IN2
SYNC_IN1
DDC_IN2
DDC_IN1
RT
3
4
5
6
9
12
13
15
1
8
14
16
DDC_OUT2
DDC_OUT1
11
10
BYP
RT
7
ENABLE
2
PACKAGE / PINOUT DIAGRAM
Top View
16 Pin QSOP
VCC
1
2
3
4
5
6
7
8
10
9
11
12
13
14
15
16
ENABLE
VIDEO_1
VIDEO_2
VIDEO_3
GND
VCC_DDC
BYP
SYNC_IN2
SYNC_OUT1
SYNC_OUT2
SYNC_IN1
DDC_IN2
DDC_OUT2
DDC_OUT1
DDC_IN1
Table 1. PIN DESCRIPTIONS
Lead(s)
Name
Description
1
VCC
This is a supply input for the SYNC_1 and SYNC_2 level shifters, video protection and the DDC circuits.
2
ENABLE
Active high enable. Disables the Sync buffer outputs when low.
3
VIDEO_1
Video signal ESD protection channel. This pin is typically tied one of the video lines between the control-
ler device and the video connector.
4
VIDEO_2
Video signal ESD protection channel. This pin is typically tied one of the video lines between the control-
ler device and the video connector.
5
VIDEO_3
Video signal ESD protection channel. This pin is typically tied one of the video lines between the control-
ler device and the video connector.
6
GND
Ground reference supply pin.
7
VCC_DDC
This is an isolated supply input for the DDC_1 and DDC_2 levelshifting NFET gates.
8
BYP
An external 0.22 mF bypass capacitor is required on this pin.
9
DDC_IN1
DDC signal input. Connects to the video connector side of one of the DDC lines.signal output.
10
DDC_OUT1
DDC signal output. Connects to the monitor DDC logic.
11
DDC_OUT
DDC signal output. Connects to the monitor DDC logic.
12
DDC_IN2
DDC signal input. Connects to the video connector side of one of the DDC lines
13
SYNC_IN1
Sync signal buffer input. Connects to the video connector side of one of the sync lines.
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