参数资料
型号: COP820CJMHD-2
元件分类: 8位微控制器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件页数: 1/26页
文件大小: 352K
代理商: COP820CJMHD-2
COP820C/840C Family
8-Bit CMOS ROM Based Microcontrollers with 1k or 2k
Memory
General Description
Note: COP8SA devices are instruction set and pinout com-
patible supersets of the COP800C Family devices, and are
replacements for these in new designs when possible.
The COP820C/840C Family ROM based microcontrollers
are integrated COP8 Base core devices with smaller
memory (1k/2k), and fewer on-board features. These single-
chip CMOS devices are suited for lower-functionality appli-
cations where system cost is of prime consideration. Pin and
software compatible (different V
CC range) 4k/32k OTP ver-
sions are available (COP87LxxCJ/RJ Family). Erasable win-
dowed versions are available for use with a range of COP8
software and hardware development tools.
Family features include an 8-bit memory mapped architec-
ture, 10 Hz CKI with 1s instruction cycle, one multi-function
16-bit timer/counter with PWM, MICROWIRE/PLUS serial
I/O, power saving HALT mode, three clock modes, high cur-
rent outputs, software selectable I/O options, 2.3v-6.0v op-
eration and 20/28 pin packages.
Devices included in this datasheet are:
Device
Memory (bytes)
RAM
(bytes)
I/O Pins
Packages
Temperature
Comments
COP620C
1k ROM
64
24
28 DIP/SOIC
-55 to +125C
4.5v - 5.5v
COP820C
1k ROM
64
24
28 DIP/SOIC
-40 to +85C
COP920C
1k ROM
64
24
28 DIP/SOIC
0 to +70C
2.3v-4.0v,
CH=4.0v-6.0v
COP622C
1k ROM
64
16
20 DIP/SOIC
-55 to +125C
4.5v - 5.5v
COP822C
1k ROM
64
16
20 DIP/SOIC
-40 to +85C
COP922C
1k ROM
64
16
20 DIP/SOIC
0 to +70C
2.3v-4.0v,
CH=4.0v-6.0v
COP640C
2k ROM
128
24
28 DIP/SOIC
-55 to +125C
4.5v - 5.5v
COP840C
2k ROM
128
24
28 DIP/SOIC
-40 to +85C
COP940C
2k ROM
128
24
28 DIP/SOIC
0 to +70C
2.3v-4.0v,
CH=4.0v-6.0v
COP642C
2k ROM
128
16
20 DIP/SOIC
-55 to +125C
4.5v - 5.5v
COP842C
2k ROM
128
16
20 DIP/SOIC
-40 to +85C
COP942C
2k ROM
128
16
20 DIP/SOIC
0 to +70C
2.3v-4.0v,
CH=4.0v-6.0v
Key Features
n
16-bit multi-function timer supporting
— PWM mode
— External event counter mode
— Input capture mode
n
1024 bytes ROM/64 bytes RAM-COP820C
n
2048 bytes ROM/128 bytes RAM-COP840C
I/O Features
n
Memory mapped I/O
n
Software selectable I/O options (TRI-STATE Output,
Push-Pull Output, Weak Pull-Up Input, High Impedance
Input)
n
High current outputs
n
Schmitt trigger inputs on Port G
n
MICROWIRE/PLUS serial I/O
n
Packages:
— 20 DIP/SO with 16 I/O pins
— 28 DIP/SO with 24 I/O pins
CPU/Instruction Set Feature
n
1 s instruction cycle time
n
Three multi-source interrupts servicing
— External interrupt with selectable edge
— Timer interrupt
— Software interrupt
n
Versatile and easy to use instruction set
n
8-bit Stack point (SP) — stack in RAM
n
Two 8-bit Register Indirect Memory Pointers (B, X)
Fully Static CMOS
n
Low current drain (typically < 1 A)
n
Single supply operation: 2.5V to 6.0V
TRI-STATE is a registered trademark of National Semiconductor Corporation.
COP8, MICROWIRE and MICROWIRE/PLUS are trademarks of National Semiconductor Corporation.
August 2000
COP820C/COP840C
Family
CMOS
ROM
Based
Microcontrollers
with
1k
or
2k
Memory
2000 National Semiconductor Corporation
DS009103
www.national.com
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