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| 型号： | COP8SGH528M7 |
| 厂商： | National Semiconductor Corporation |
| 英文描述： | LP38691/LP38693 500mA Low Dropout CMOS Linear Regulators Stable with Ceramic Output Capacitors; Package: SOT-223; No of Pins: 5 |
| 中文描述： | 8位的CMOS基于ROM和OTP微控制器具有8K到32K的内存，2个比较器和USART |
| 文件页数： | 37/62页 |
| 文件大小： | 913K |
| 代理商： | COP8SGH528M7 |
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10.0 Interrupts
(Continued)
10.3.1 VIS Execution
When the VIS instruction is executed it activates the arbitra-
tion logic. The arbitration logic generates an even number
between E0 and FE (E0, E2, E4, E6 etc...) depending on
which active interrupt has the highest arbitration ranking at
the time of the 1st cycle of VIS is executed. For example, if
the software trap interrupt is active, FE is generated. If the
external interrupt is active and the software trap interrupt is
not, then FA is generated and so forth. If the only active
interrupt is software trap, than E0 is generated. This number
replaces the lower byte of the PC. The upper byte of the PC
remains unchanged. The new PC is therefore pointing to the
vector of the active interrupt with the highest arbitration
ranking. This vector is read from program memory and
placed into the PC which is now pointed to the 1st instruction
of the service routine of the active interrupt with the highest
arbitration ranking.
Figure 26 illustrates the different steps performed by the VIS
instruction. Figure 27 shows a flowchart for the VIS instruc-
tion.
The non-maskable interrupt pending flag is cleared by the
RPND (Reset Non-Maskable Pending Bit) instruction (under
certain conditions) and upon RESET.
10131729
FIGURE 26. VIS Operation
C
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相关PDF资料 |
PDF描述 |
|---|---|
| COP8SGH528M8 | LP38691/LP38693 500mA Low Dropout CMOS Linear Regulators Stable with Ceramic Output Capacitors; Package: SOT-223; No of Pins: 5 |
| COP8SGH528M9 | LP38691/LP38693 500mA Low Dropout CMOS Linear Regulators Stable with Ceramic Output Capacitors; Package: SOT-223; No of Pins: 5 |
| COP8SGH528N3 | LP38691/LP38693 500mA Low Dropout CMOS Linear Regulators Stable with Ceramic Output Capacitors; Package: SOT-223; No of Pins: 5 |
| COP8SGH528N6 | LP38691-ADJ/LP38693-ADJ 500mA Low Dropout CMOS Linear Regulators with Adjustable Output Stable with Ceramic Output Capacitors; Package: SOT-223; No of Pins: 5 |
| COP8SGH528N7 | LP38691/LP38693 500mA Low Dropout CMOS Linear Regulators Stable with Ceramic Output Capacitors; Package: LLP; No of Pins: 6 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| COP8SGR728M7 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| COP8SGR728M7/NOPB | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| COP8SGR728M8 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| COP8SGR728M8/NOPB | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| COP8SGR728N8 | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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