参数资料
| 型号： | CS2001YDWFR20 |
| 厂商： | ON Semiconductor |
| 文件页数： | 3/7页 |
| 文件大小： | 0K |
| 描述： | IC REG BST FLYBK ADJ 1.2A 20SOIC |
| 产品变化通告： | Product Obsolescence 30/Dec/2003 |
| 标准包装： | 1,000 |
| 类型： | 升压，反激式 |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 4.9 V ~ 5.1 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 150kHz |
| 电流 - 输出： | 1.2A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SOIC（0.295"，7.50mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-SOIC |
| 其它名称： | CS2001YDWFR20OS |
CS2001
ELECTRICAL CHARACTERISTICS (8.0 V ≤ V BAT ≤ 16 V, 8.0 V ≤ VER ≤ 25 V, 1.0 mA ≤ I V(OUT) ≤ 100 mA,
T TEST = ? 40 ° C to 125 ° C; unless otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Linear Regulator
Output Voltage
Regulator Bias Current (from V BAT )
Regulator Bias Current (from VER)
Dropout Voltage V BAT ? V OUT
Dropout Voltage VER ? V OUT
Smart Switch Threshold
V BAT to VER
Smart Switch Threshold Hysteresis
V OUT Output Noise
Line Regulation
Load Regulation
Output Current Limit
Output Driven from V BAT , VER = 25 V
Output Driven from VER, V BAT = 0 V
I V(BAT) @ I V(OUT) = ? 100 mA,
SWSD = 4.0 V, V BAT = 16 V, VER = 25 V
T = ? 40 ° C
T = 25 ° C
T = 125 ° C
I VER @ I V(OUT) = ? 100 mA,
SWSD = 4.0 V, V BAT = 0 V, VER = 25 V
T = ? 40 ° C
T = 25 ° C
T = 125 ° C
VER = 25 V, I V(OUT) = ? 100 mA (Probe Only)
V BAT = 0 V, I V(OUT) = ? 100 mA
VER = 25 V, I V(OUT) = ? 50 mA
VER = 25 V, I V(OUT) = ? 50 mA
V BAT = 16 V, VER = 25 V, I V(OUT) = ? 1.0 mA,
C = 10 μ F, ESR = 0.5 Ω
?
?
?
4.9
4.9
?
?
?
?
?
?
?
?
6.5
0.5
?
?
?
120
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
5.1
5.1
8.0
7.0
6.0
11
9.0
8.0
1.5
1.5
8.0
1.0
0.05
0.025
0.025
?
V
V
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
V
mA
Switching Regulator
VER = 25V, I V(OUT) = ? 1.0 mA
Switching Frequency
Pump Drive Current
Switch Saturation Voltage
Output Current Limit
V FB Regulation
V FB Input Current
V FB Input Shorted Low Detection
Level
C PUMP Short Detection Threshold
Maximum Duty Cycle
V SW Leakage Current
C PUMP 270 pF, R I(BIAS) = 30.1 k Ω
Δ I V(BAT) for 0 A ≤ I V(SW) ≤ 1.2 A
I V(SW) = 1.2 A
?
?
V FB Above Short Low Detection Level
?
?
?
I V(SW) @ V SW = 50 V, SWSD = V OUT
135
?
?
1.2
1.238
?
200
200
80
?
150
?
?
?
1.27
?
250
250
?
?
165
50
1.6
2.4
1.303
1.0
300
300
95
100
kHz
mA
V
A
V
μ A
mV
mV
%
μ A
Voltage Tripler
V BAT = 16 V, I V(OUT) = ? 1.0 mA, C CHG = 1.5 m F
Output Voltage Clamp
V CHG ? VER
Initial Charge Time
Maximum Output Voltage Clamp
VER = 8.0 V, I V(CHG) = ? 30 μ A
VER = 12 V, I V(CHG) = ? 90 μ A
C CHG = 0.15 μ F, VER = 8.0 V,
V CHG = 14.25 V
?
6.25
6.25
?
25
8.0
8.0
?
32.5
13
13
30
40
V
V
ms
V
V CHG
Output Voltage Clamp V CHG
Short Circuit Path Current Limit VER
VER = 28 V, I V(CHG) = 0 μ A
?
25
?
32.5
?
40
3.0
V
mA
to V CHG
http://onsemi.com
3
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