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参数资料
| 型号： | CS2660-9PDDB1 |
| 厂商： | POWER-ONE INC |
| 元件分类： | 电源模块 |
| 英文描述： | 2-OUTPUT DC-DC REG PWR SUPPLY MODULE |
| 封装： | METAL, CASE S02, MODULE |
| 文件页数： | 6/33页 |
| 文件大小： | 438K |
| 代理商： | CS2660-9PDDB1 |
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S Series Data Sheet
100 Watt AC-DC and DC-DC Converters
APR 26, 2006 revised to SEP 25, 2006
Page 14 of 33
www.power-one.com
Table 7b: R’ext for Vo > Vo nom; approximative values (Vi nom, Io nom, series E 96 resistors); Rext = not fitted
Vo nom = 5.1 V
Vo nom = 12 V
Vo nom = 15 V
Vo nom = 24 V
Vo [V]
R'ext [kΩ
Ω]
Vo [V]
1
R'ext [kΩ
Ω]
Vo [V]
1
R'ext [kΩ
Ω]
Vo [V]
1
R'ext [kΩ
Ω]
5.15
432
12.1
24.2
1820
15.2
30.4
1500
24.25
48.5
3320
5.2
215
12.2
24.4
931
15.4
30.8
768
24.5
49.0
1690
5.25
147
12.3
24.6
619
15.6
31.2
523
24.75
49.5
1130
5.3
110
12.4
24.8
475
15.8
31.6
392
25.0
50.0
845
5.35
88.7
12.5
25.0
383
16.0
32.0
316
25.25
50.5
698
5.4
75
12.6
25.2
316
16.2
32.4
267
25.5
51.0
590
5.45
64.9
12.7
25.4
274
16.4
32.8
232
25.75
51.5
511
5.5
57.6
12.8
25.6
243
16.5
33.0
221
26.0
52.0
442
13.0
26.0
196
26.25
52.5
402
13.2
26.4
169
26.4
52.8
383
1 First column: Vo or Vo1, second column: outputs of double-output models in series connection
Display Status of LEDs
Vo1 > 0.95 to 0.98Vo1 adj
Vi max Vi ov
Vi min
Vi uv
Vi
Vi abs
OK
i
Vo1 > 0.95 to 0.98Vo1 adj
Io nom
IoL
Io
OK
Io L
Vo1 < 0.95 to 0.98Vo1 adj
TC
i
TC max
TPTC threshold
Vi inh
i
+50 V
+0.8 V
+2.4 V
-50 V
Vinh threshold
Io L
LED off
LED on
LED Status undefined
06002_011106
Test Jacks
Test jacks for measuring the output voltage Vo or Vo1 are
located at the front of the converter. The positive test jack is
protected by a series resistor (see: Functional Description,
block diagrams). The voltage measured at the test jacks is
slightly lower than the value at the output terminals.
Fig. 18
LEDs
"
OK", "i" and "Io L"status versus input voltage
Conditions: Io ≤ Io nom, TC ≤ TC max, Vinh ≤ 0.8 V
Vi uv = undervoltage lockout, Vi ov = overvoltage lockout
LEDs "OK" and "Io L"status versus output current
Conditions: Vi min - Vi max, TC ≤ TC max, Vinh ≤ 0.8 V
LED "i"versus case temperature
Conditions: Vi min - Vi max, Io ≤ Io nom, Vinh ≤ 0.8 V
LED "i"versus Vinh
Conditions: Vi min - Vi max, Io ≤ Io nom, TC ≤ TC max
R'ext
Rext
14
16
Vo1–
Vo1+
R
Vo2–
Vo2+
12
10
8
6
4
+
–
Vo1
24 V
30 V
48 V
06004_012006
co
Fig. 17
Wiring for output voltage 24 V, 30 V, or 48 V (double-output
models) with both outputs connected in series. A ceramic
capacitor (Co) across the load reduces ripple and spikes.
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