
Undervoltage Lockout
During Undervoltage Lockout (Figure 1), the output driv-
er is biased to a high impedance state. VOUT should be
shunted to ground with a resistor to prevent output leak-
age current from activating the power switch.
PWM Waveform
To generate the PWM waveform, the control voltage from
the error amplifier is compared to a current sense signal
which represents the peak output inductor current
(Figure 2). An increase in VCC causes the inductor current
slope to increase, thus reducing the duty cycle. This is an
inherent feed-forward characteristic of current mode con-
trol, since the control voltage does not have to change
during changes of input supply voltage.
When the power supply sees a sudden large output cur-
rent increase, the control voltage will increase allowing
the duty cycle to momentarily increase. Since the duty
4
CS3842B/3843B
Test Circuit
VREF
VCC
VOUT
1k
1W
0.1F
VREF
VCC
VOUT
Gnd
VFB
Sense
OSC
COMP
5k
100k
4.7k
1k
ERROR AMP
ADJUST
4.7k
Sense
ADJUST
RT
2N2222
CT
Gnd
A
CS-3842B
CS-3843B
Circuit Description
Typical Performance Characteristics:
Oscillator Duty Cycle vs RT
Oscillator Frequency vs CT
VCC
ON/OFF Command
to reset of IC
VON
16V
8.4V
VOFF
10V
7.6V
CS3842B CS3843B
<0.5mA
<15mA
VON VOFF
ICC
VCC
Figure 1: Typical Undervoltage Characteristics
.0005
.001
.002
.003
.005
.01
.02
.03
.04
800
900
FREQ.
(kHz)
CT (F)
700
600
500
400
300
200
100
.05
RT =1.5k
RT =680
RT =10k
100
200
700
1k
2k
5k
7k
10k
80
90
DUTY
CYCLE
(%)
RT ()
70
60
50
40
30
20
10
4k
3k
500
400
300
100