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参数资料
| 型号： | CS3845GDR8 |
| 厂商： | ON SEMICONDUCTOR |
| 元件分类： | 稳压器 |
| 英文描述： | 1 A SWITCHING CONTROLLER, PDSO8 |
| 封装： | SO-8 |
| 文件页数： | 7/12页 |
| 文件大小： | 158K |
| 代理商： | CS3845GDR8 |
CS2844, CS3844, CS2845, CS3845
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS (continued) (–25
° ≤ TA ≤ 85° for CS2844/2845, 0° ≤ TA ≤ 70° for CS3844/CS3845.
VCC = 15 V*; RT = 10 k, CT = 3.3 nF for sawtooth mode; unless otherwise stated.)
CS2842A/CS2843A
CS3842A/CS3843A
Characteristic
Test Conditions
Min
Typ
Max
Min
Typ
Max
Unit
Error Amp Section
Input Voltage
VCOMP = 2.5 V
2.45
2.50
2.55
2.42
2.50
2.58
V
Input Bias Current
VFB = 0
–
–0.3
–1.0
–
–0.3
–2.0
A
AVOL
2.0
≤ VOUT ≤ 4.0 V
65
90
–
65
90
–
dB
Unity Gain Bandwidth
Note 4.
0.7
1.0
–
0.7
1.0
–
MHz
PSRR
12
≤ VCC ≤ 25 V
60
70
–
60
70
–
dB
Output Sink Current
VFB = 2.7 V, VCOMP = 1.1 V
2.0
6.0
–
2.0
6.0
–
mA
Output Source Current
VFB = 2.3 V, VCOMP = 5.0 V
–0.5
–0.8
–
–0.5
–0.8
–
mA
VOUT High
VFB = 2.3 V, RL = 15 k to GND
5.0
6.0
–
5.0
6.0
–
V
VOUT Low
VFB = 2.7 V, RL = 15 k to VREF
–
0.7
1.1
–
0.7
1.1
V
Current Sense Section
Gain
Notes 5 & 6.
2.85
3.00
3.15
2.85
3.00
3.15
V/V
Maximum Input Signal
VCOMP = 5.0 V. Note 5.
0.9
1.0
1.1
0.9
1.0
1.1
V
PSRR
12
≤ VCC ≤ 25 V. Note 5.
–
70
–
70
–
dB
Input Bias Current
VSENSE = 0
–
–2.0
–10
–
–2.0
–10
A
Delay to Output
TJ = 25°C. Note 4.
–
150
300
–
150
300
ns
Output Section
Output Low Level
ISINK = 20 mA
ISINK = 200 mA
–
0.1
1.5
0.4
2.2
–
0.1
1.5
0.4
2.2
V
Output High Level
ISOURCE = 20 mA
ISOURCE = 200 mA
13
12
13.5
–
13
12
13.5
–
V
Rise Time
TJ = 25°C, CL = 1.0 nF. Note 4.
–
50
150
–
50
150
ns
Fall Time
TJ = 25°C, CL = 1.0 nF. Note 4.
–
50
150
–
50
150
ns
Total Standby Current
Startup Current
–
0.5
1.0
–
0.5
1.0
mA
Operating Supply Current
VFB = VSENSE = 0 V,
RT = 10 k, CT = 3.3 nF
–
11
17
–
11
17
mA
VCC Zener Voltage
ICC = 25 mA
–
34
–
34
–
V
PWM Section
Maximum Duty Cycle
–
46
48
50
46
48
50
%
Minimum Duty Cycle
–
0
–
0
%
4. These parameters, although guaranteed, are not 100% tested in production.
5. Parameters measured at trip point of latch with VFB = 0.
6. Gain defined as: A =
VCOMP/VSENSE; 0 ≤ VSENSE ≤ 0.8 V.
*Adjust VCC above the start threshold before setting at 15 V.
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