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CS4201
DS483PP3
5
LIST OF FIGURES
Figure 1. Power Up Timing...............................................................................................11
Figure 2. Codec Ready from Start-up or Fault Condition .................................................11
Figure 3. Clocks................................................................................................................11
Figure 4. Data Setup and Hold.........................................................................................12
Figure 5. PR4 Powerdown and Warm Reset....................................................................12
Figure 6. Test Mode .........................................................................................................12
Figure 7. AC-link Connections..........................................................................................13
Figure 8. CS4201 Mixer Diagram.....................................................................................15
Figure 9. AC-link Input and Output Framing.....................................................................16
Figure 10. Serial Data Port: Six Channel Circuit ..............................................................40
Figure 11. Serial Data Format 0 (I2S) ..............................................................................42
Figure 12. Serial Data Format 1 (Left Justified)................................................................42
Figure 13. Serial Data Format 2 (Right Justified, 20-bit data) ..........................................42
Figure 14. Serial Data Format 3 (Right Justified, 16-bit data) ..........................................42
Figure 15. S/PDIF Output.................................................................................................43
Figure 16. PLL External Loop Filter..................................................................................48
Figure 17. External Crystal...............................................................................................48
Figure 18. Line Input (Replicate for Video and AUX) .......................................................50
Figure 19. Differential 2 VRMS CD Input..........................................................................50
Figure 20. Differential 1 VRMS CD Input..........................................................................50
Figure 21. Microphone Input.............................................................................................51
Figure 22. PC_BEEP Input...............................................................................................51
Figure 23. Modem Connection .........................................................................................51
Figure 24. Line Out and Headphone Out Setup...............................................................52
Figure 25. Line Out/Headphone Out Setup......................................................................52
Figure 26. +5V Analog Voltage Regulator........................................................................53
Figure 27. Conceptual Layout for the CS4201 when in XTAL or OSC Clocking Modes ..55
Figure 28. Pin Locations for the CS4201..........................................................................56
Figure 29. CS4201 Reference Design..............................................................................64