参数资料
型号: CS4202-JQZR
厂商: Cirrus Logic Inc
文件页数: 55/66页
文件大小: 0K
描述: IC CODEC AUDIO '97 48-TQFP
标准包装: 2,000
类型: 音频编解码器 '97
数据接口: 串行
分辨率(位): 24 b
ADC / DAC 数量: 1 / 1
三角积分调变:
动态范围,标准 ADC / DAC (db): 90 / 90
电压 - 电源,模拟: 4.75 V ~ 5.25 V
电压 - 电源,数字: 4.75 V ~ 5.25 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-TQFP(9x9)
包装: 带卷 (TR)
Micrel, Inc.
MIC3001
August 2004
59
M9999-082404-A
hbwhelp@micrel.com or (408) 955-1690
APC Setpoint 0 (APCSET0)
Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 00
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
3 = 03h
When A.P.C. is on, i.e., the APCCAL bit in OEMCAL0 is set, the value in APCSETx is added to the signed value taken from the
A.P.C. look-up table and loaded into the VBIAS DAC. When A.P.C. is off, the value in APCSET is loaded directly into the VBIAS
DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in the VBIAS register. The
APCCFG bits determine the DAC’s response to higher or lower numeric values. A valid OEM password is required for access to
this register. This register is non-volatile and will be maintained through power and reset cycles.
APC Setpoint 1 (APCSET1)
Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 01
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
4 = 04h
When A.P.C. is on, i.e., the APCCAL bit in OEMCAL0 is set, the value in APCSETx is added to the signed value taken from the
A.P.C. look-up table and loaded into the VBIAS DAC. When A.P.C. is off, the value in APCSET is loaded directly into the VBIAS
DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in the VBIAS register. The
APCCFG bits determine the DAC’s response to higher or lower numeric values. A valid OEM password is required for access to
this register. This register is non-volatile and will be maintained through power and reset cycles.
APC Setpoint 2 (APCSET2)
Automatic power control setpoint (unsigned binary) used when APCSEL[1:0] = 10
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
5 = 05h
When A.P.C. is on, i.e., the APCCAL bit in OEMCAL0 is set, the value in APCSETx is added to the signed value taken from the
A.P.C. look-up table and loaded into the VBIAS DAC. When A.P.C. is off, the value in APCSET is loaded directly into the VBIAS
DAC, bypassing the look-up table entirely. In either case, the VBIAS DAC setting is reported in the VBIAS register. The
APCCFG bits determine the DAC’s response to higher or lower numeric values. This register is non-volatile and will be
maintained through power and reset cycles. A valid OEM password is required for access to this register.
Modulation DAC Setting (MODSET)
Nominal VMOD setpoint
D[7]
read/write
D[6]
read/write
D[5]
read/write
D[4]
read/write
D[3]
read/write
D[2]
read/write
D[1]
read/write
D[0]
read/write
Default Value
0000 0000b = 00h
Serial Address
A6h = 1010011b
Byte Address
6 = 06h
When A.P.C. is on, the value corresponding to the current temperature is taken from the MODLUT look-up table, added to
MODSET and loaded into the VMOD DAC. This register is non-volatile and will be maintained through power and reset cycles. A
valid OEM password is required for access to this register.
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