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参数资料
| 型号： | CS4221-KS |
| 厂商： | CRYSTAL SEMICONDUCTOR CORP |
| 元件分类： | 消费家电 |
| 英文描述： | 24-Bit Stereo Audio Codec with 3V Interface |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO28 |
| 封装： | SSOP-28 |
| 文件页数： | 14/32页 |
| 文件大小： | 770K |
| 代理商： | CS4221-KS |
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CS4220 CS4221
14
DS284PP3
5.1.6
CLOCKING ERROR (CLKE) (READ ONLY)
Default = 0
0 - No error
1 - Error
5.2
DAC Control (address 02h)
5.2.1
MUTE ON CONSECUTIVE ZEROS (MUTC)
Default = 0
0 - Disabled
1 - Enabled
Function:
The DAC output will mute following the reception of 512 consecutive audio samples of static 0 or -1
when this function is enabled. A single sample of non-static data will release the mute. Detection and
muting is done independently for each channel. The muting function is affected, similar to volume
control changes, by the SOFT bit in the DAC Control register.
5.2.2
MUTE CONTROL (MUTR-MUTL)
Default = 0
0 - Disabled
1 - Enabled
Function:
The output for the selected DAC channel will be muted when this function is enabled. The muting
function is affected, similar to volume control changes, by the SOFT bit in the DAC Control register.
5.2.3
SOFT RAMP CONTROL (SOFT)
Default = 0
0 - Soft Ramp level changes
1 - Zero Cross level changes
Function:
Soft Ramp level changes will be implemented by incrementally ramping, in 0.5 dB steps, from the cur-
rent level to the new level. The rate of change defaults to 0.5 dB per 8 left/right clock periods and is
adjustable through the RMP bits in the DAC Control register.
Zero Cross level changes will be implemented in a single step from the current level to the new level.
The level change takes effect on a zero crossing to minimize audible artifacts. If the signal does not
encounter a zero crossing, the level change will occur after a timeout period of 512 sample periods
(10.7 ms at 48 kHz sample rate). Zero crossing is independently monitored and implemented for each
channel. The ACCR and ACCL bits in the Converter Status Report register indicate when a level
change has occurred for the right and left channel.
7
6
5
4
3
2
1
0
Reserved
0
MUTC
0
MUTR
0
MUTL
0
SOFT
0
Reserved
0
RMP1
0
RMP0
0
相关PDF资料 |
PDF描述 |
|---|---|
| CS4222-KS | 20-Bit Stereo Audio Codec with Volume Control |
| CS4222 | 20-Bit Stereo Audio Codec with Volume Control |
| CS4224 | 24-Bit 105 dB Audio Codec with Volume Control |
| CS4223-BS | 24-Bit 105 dB Audio Codec with Volume Control |
| CS4223 | 24-Bit 105 dB Audio Codec with Volume Control |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS4221-KSR | 功能描述:接口—CODEC IC 24Bit Str Audio CODEC 3V Intrfc RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| CS4222 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:20-Bit Stereo Audio Codec with Volume Control |
| CS4222_02 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:20-Bit Stereo Audio Codec with Volume Control |
| CS4222-BS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CS4222-DS | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cirrus Logic 功能描述: |
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