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参数资料
| 型号： | CS4224 |
| 厂商： | Cirrus Logic, Inc. |
| 元件分类： | Codec |
| 英文描述： | 24-Bit 105 dB Audio Codec with Volume Control |
| 中文描述： | 24位105分贝的音量控制音频编解码器 |
| 文件页数： | 18/32页 |
| 文件大小： | 778K |
| 代理商： | CS4224 |
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CS4223 CS4224
18
DS290PP3
6.
PIN DESCRIPTIONS — CS4223
1
2
3
4
5
6
7
8
9
10
11
12
13
14
21
20
22
23
24
25
26
27
28
NC
RST
AOUTL-
AOUTL+
AOUTR+
AOUTR-
AGND
VA
AINL+
AINL-
DEM1
AINR+
AINR-
NC
SDOUT
SDIN
DGND
VD
SCLK
LRCK
XTI
XTO
NC
17
16
18
19
DEM0
DIF0
DIF1
15
NC
VL
CS4223
NC
1,14,15, 28
No Connect -
These pins are not connected internally and should be tied to DGND to mini-
mize noise coupling.
XTI, XTO
2,3
Crystal Connections (Input/Output) -
Input and output connections for the crystal used to
clock the CS4223. Alternatively, a clock may be input into XTI. This is the clock source for the
delta-sigma modulator and digital filters. The frequency of this clock must be either 256x, 384x,
or 512x Fs in Slave Mode and 256x in Master Mode.
LRCK
4
Left/Right Clock (Input) -
Determines which channel is currently being input/output of the
serial audio data pins SDIN/SDOUT. The frequency of the Left/Right clock must be equal to the
input sample rate. Although the outputs for each ADC channel are transmitted at different
times, Left/Right pairs represent simultaneously sampled analog inputs. The required relation-
ship between the left/right clock, serial clock and serial data is defined by the DIF1-0 pins. The
options are detailed in Figures 8 - 11.
SCLK
5
Serial Data Clock (Input) -
Clocks the individual bits of the serial data into the SDIN pin and
out of the SDOUT pin. The required relationship between the left/right clock, serial clock and
serial data is defined by the DIF1-0 pins. The options are detailed in Figures 8 - 11.
VD
6
Digital Power (Input) -
Positive power supply for the digital section. Typically 5.0 VDC.
DGND
7
Digital Ground (Input) -
Digital ground for the digital section.
SDOUT
8
Serial Data Output (Output) -
Two’s complement MSB-first serial data is output on this pin.
The required relationship between the left/right clock, serial clock and serial data is defined by
the DIF1-0 pins. The options are detailed in Figures 8 - 11.
Fs (kHz)
XTI (MHz)
384x
12.2880
16.9344
18.4320
256x
8.1920
11.2896
12.2880
512x
16.3840
22.5792
24.5760
32
44.1
48
Table 2. Common Clock Frequencies
相关PDF资料 |
PDF描述 |
|---|---|
| CS4223-BS | 24-Bit 105 dB Audio Codec with Volume Control |
| CS4223 | 24-Bit 105 dB Audio Codec with Volume Control |
| CS4223-KS | IC EEPROM SRL 1024X8BIT 8DIP |
| CS4224-BS | 24-Bit 105 dB Audio Codec with Volume Control |
| CS4224-KS | 24-Bit 105 dB Audio Codec with Volume Control |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CS4224-BS | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CS4224KS | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:Soundcard Circuits |
| CS4224-KS | 功能描述:接口—CODEC 24-Bit 105dB Ster Cod w/o Vol. Con. RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| CS4224-KSR | 功能描述:接口—CODEC 24-Bit 105dB Ster Cod w/o Vol. Con. RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| CS4224-KSRZ | 制造商:Cirrus Logic 功能描述:AUD CODEC 2ADC / 2DAC 24BIT 28SSOP - Tape and Reel |
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