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| 型号： | CS5101EDWR16 |
| 厂商： | ON Semiconductor |
| 文件页数： | 3/9页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK 5V 1.5A 16SOIC |
| 产品变化通告： | Product Discontinuation 27/Jun/2007 |
| 标准包装： | 1,000 |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 5V |
| 输入电压： | 8 V ~ 45 V |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 16-SOIC W |
CS5101
ELECTRICAL CHARACTERISTICS ( ? 40 ° C ≤ T A ≤ 85 ° C, ? 40 ° C ≤ T J ≤ 150 ° C, 10 V < V CC < 45 V, 8.0 V < V C < 75 V; unless
otherwise specified.)
Characteristic
Test Conditions
Min
Typ
Max
Unit
Error Amplifier
Input Voltage Initial Accuracy
Input Voltage
Input Bias Current
Open Loop Gain
Unity Gain Bandwidth
Output Sink Current
Output Source Current
V COMP High
V COMP Low
PSRR
V FB = V COMP , V CC = 15 V, T = 25 ° C, Note 3
V FB = V COMP , includes line and temp
V FB = 0 V, IV FB flows out of pin
1.5 V < V COMP < 3.0 V
1.5 V < V COMP < 3.0 V, Note 3
V COMP = 2.0 V, V FB = 2.2 V
V COMP = 2.0 V, V FB = 1.8 V
V FB = 1.8 V
V FB = 2.2 V
10 V < V CC < 45 V, V FB = V COMP , Note 3
1.98
1.94
?
60
0.7
2.0
2.0
3.3
0.85
60
2.00
2.00
?
70
1.0
8.0
6.0
3.5
1.0
70
2.02
2.06
500
?
?
?
?
3.7
1.15
?
V
V
nA
dB
MHz
mA
mA
V
V
dB
Voltage Reference
Output Voltage Initial Accuracy
Output Voltage
Line Regulation
Load Regulation
Current Limit
V REF ? OK FAULT V
V REF ? OK V
V REF ? OK Hysteresis
V CC = 15 V, T = 25 ° C, Note 3
0 A < I REF < 8.0 mA
10 V < V CC < 45 V, I REF = 0 A
0 A < I REF < 8.0 mA
V REF = 4.8 V
V SYNC = 5.0 V, V REF = V LOAD
V SYNC = 5.0 V, V REF = V LOAD
?
4.9
4.8
?
?
10
4.10
4.30
40
5.0
5.0
10
20
50
4.40
4.50
100
5.1
5.2
60
60
?
4.60
4.80
250
V
V
mV
mV
mA
V
V
mV
Current Sense Amplifier
IS COMP High V
IS COMP Low V
Source Current
Sink Current
Open Loop Gain
CMRR
PSRR
Unity Gain Bandwidth
Input Offset Voltage
Input Bias Currents
Input Offset Current (IS+, IS ? )
Input Signal Voltage Range
IS+ = 5.0 V, IS ? = IS COMP
IS+ = 0 V, IS ? = IS COMP
IS+ = 5.0 V, IS ? = 0 V
IS ? = 5.0 V, IS+ = 0 V
1.5 V ≤ V COMP ≤ 4.5 V, R L = 4.0 k W
Note 3
10 V < V CC < 45 V, Note 3
1.5 V ≤ V COMP ≤ 4.5 V, R L = 4.0 k W , Note 3
V IS + = 2.5 V, V IS ? = V ISCOMP
V IS + = V IS ? = 0 V, I IS flows out of pins
?
Note 3
4.7
0.5
2.0
10
60
60
60
0.5
? 8.0
?
? 250
? 0.3
5.0
1.0
10
20
80
80
80
0.8
0
20
0
?
5.3
1.3
?
?
?
?
?
?
8.0
250
250
V CC ? 4.0
V
V
mA
mA
dB
dB
dB
MHz
mV
nA
nA
V
RAMP/SYNC Generator
RAMP Source Current Initial Accuracy
RAMP Source Current
RAMP Sink Current
RAMP Peak Voltage
RAMP Valley Voltage
RAMP Dynamic Range
RAMP Sleep Threshold Voltage
SYNC Threshold
SYNC Input Bias Current
V SYNC = 5.0 V, V RAMP = 2.5 V, T = 25 ° C, Note 3
V SYNC = 5.0 V, V RAMP = 2.5 V
V SYNC = 0 V, V RAMP = 2.5 V
V SYNC = 5.0 V
V SYNC = 0 V
V RAMPDR = V RAMPPK ? V RAMPVY
V RAMP @ V REF < 2.0 V
V SYNC @ V RAMP > 2.5 V
V SYNC = 0 V, I SYNC flows out of pin
0.18
0.16
1.0
3.3
1.4
1.7
0.3
2.3
?
0.20
0.20
4.0
3.5
1.5
2.0
0.6
2.5
1.0
0.22
0.24
?
3.7
1.6
2.3
1.0
2.7
20
mA
mA
mA
V
V
V
V
V
m A
3. Guaranteed by design. Not 100% tested in production.
http://onsemi.com
3
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