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| 型号： | CS51033GD8G |
| 厂商： | ON Semiconductor |
| 文件页数： | 5/10页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 8-SOIC |
| 产品变化通告： | Product Obsolescence 24/Jan/2011 |
| 标准包装： | 98 |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 240kHz |
| 占空比： | 83.3% |
| 电源电压： | 3 V ~ 16 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 管件 |
CS51033
CIRCUIT DESCRIPTION
) T
ICS + IT *
THEORY OF OPERATION
Control Scheme
The CS51033 monitors the output voltage to determine
when to turn on the P?Ch FET. If V FB falls below the internal
reference voltage of 1.25 V during the oscillator ’s charge
cycle, the P?Ch FET is turned on and remains on for the
duration of the charge time. The P?Ch FET gets turned off
and remains off during the oscillator ’s discharge cycle time
with the maximum duty cycle to 80%. It requires 7.0 mV
typical, and 20 mV maximum ripple on the V FB pin to
operate. This method of control does not require any loop
stability compensation.
Startup
The CS51033 has an externally programmable Soft?Start
feature that allows the output voltage to come up slowly,
preventing voltage overshoot on the output.
At startup, the voltage on all pins is zero. As V CC rises, the
V C voltage along with the internal resistor R G keeps the
P?Ch FET off. As V CC and V C continue to rise, the oscillator
capacitor (C OSC ) and the Soft?Start/Fault Timing capacitor
(CS) charges via internal current sources. C OSC gets charged
by the current source I C and CS gets charged by the I T source
combination described by:
IT I
55 5
The internal Holdoff Comparator ensures that the external
P?Ch FET is off until V CS > 0.7 V, preventing the GATE
flip?flop (F2) from being set. This allows the oscillator to
reach its operating frequency before enabling the drive
output. Soft?Start is obtained by clamping the V FB
comparator ’s (A6) reference input to approximately 1/2 of
the voltage at the CS pin during startup, permitting the
control loop and the output voltage to slowly increase. Once
the CS pin charges above the Holdoff Comparator trip point
of 0.7 V, the low feedback to the V FB Comparator sets the
GATE flip?flop during C OSC ’s charge cycle. Once the
GATE flip?flop is set, V GATE goes low and turns on the
P?Ch FET. When V CS exceeds 2.4 V, the CS charge sense
comparator (A4) sets the V FB comparator reference to 1.25
V completing the startup cycle.
Lossless Short Circuit Protection
The CS51033 has “lossless” short circuit protection since
there is no current sense resistor required. When the voltage
at the CS pin (the fault timing capacitor voltage ) reaches
2.5 V, the fault timing circuitry is enabled. During normal
operation the CS voltage is 2.6 V. During a short circuit or
a transient condition, the output voltage moves lower and the
voltage at V FB drops. If V FB drops below 1.15 V, the output
of the fault comparator goes high and the CS51033 goes into
a fast discharge mode. The fault timing capacitor, CS,
discharges to 2.4 V. If the V FB voltage is still below 1.15 V
when the CS pin reaches 2.4 V, a valid fault condition has
been detected. The slow discharge comparator output goes
high and enables gate G5 which sets the slow discharge
flip?flop. The V GATE flip?flop resets and the output switch
is turned off. The fault timing capacitor is slowly discharged
to 1.5 V. The CS51033 then enters a normal startup routine.
If the fault is still present when the fault timing capacitor
voltage reaches 2.5 V, the fast and slow discharge cycles
repeat as shown in Figure 3.
If the V FB voltage is above 1.15 V when CS reaches 2.4 V
a fault condition is not detected, normal operation resumes
and CS charges back to 2.6 V. This reduces the chance of
erroneously detecting a load transient as a fault condition.
V CS
2.6 V
2.4 V
S1
S2
S1
S2
S3
S3
S1
S2
S3
S3
2.5 V
1.5 V
0V
0V
T START
td1
t FAULT
t RESTART
td2
t FAULT
START
NORMAL OPERATION
FAULT
V GATE
1.25 V
1.15 V
V FB
Figure 3. Voltage on Start Capacitor (V GS ), the Gate (V GATE ), and in the Feedback Loop (V FB ),
During Startup, Normal and Fault Conditions
http://onsemi.com
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS51033GDR8 | 功能描述:DC/DC 开关控制器 Fast PFET Buck RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| CS51033GDR8G | 功能描述:DC/DC 开关控制器 Fast PFET Buck RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| CS51033GN8 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Voltage-Mode SMPS Controller |
| CS-51033N8 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Voltage-Mode SMPS Controller |
| CS51033YD8 | 功能描述:DC/DC 开关控制器 Fast PFET Buck RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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