参数资料
型号: CS5351-BZZ
厂商: Cirrus Logic Inc
文件页数: 16/16页
文件大小: 0K
描述: IC ADC AUD 108DB 204KHZ 24-TSSOP
标准包装: 62
位数: 24
采样率(每秒): 204k
数据接口: 串行
转换器数目: 2
功率耗散(最大): 243mW
电压电源: 模拟和数字
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 24-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 24-TSSOP
包装: 管件
输入数目和类型: 2 个单端,单极
配用: 598-1781-ND - EVALUATION BOARD FOR CS5351
其它名称: 598-1084-5
IDT / ICS 3.3V LVPECL CLOCK GENERATOR
9
ICS843001AG REV B March 2, 2009
ICS843001
FEMTOCLOCKS CRYSTAL-TO-3.3V LVPECL CLOCK GENERATOR
FIGURE 3A. ICS843001 SCHEMATIC EXAMPLE
LAYOUT GUIDELINE
Figure 3A shows a schematic example of the ICS843001. An
example of LVEPCL termination is shown in this schematic.
Additional LVPECL termination approaches are shown in the
LVPECL Termination Application Note. In this example, an 18pF
parallel resonant crystal is used. The C1 = 27pF and C2 = 33pF
are recommended for frequency accuracy. The C1 and C2 values
may be slightly adjusted for optimizing frequency accuracy.
FIGURE 3B. ICS843001 PC BOARD LAYOUT EXAMPLE
VCCA
C1
27pF
nQ
C4
0.01u
Q
R5
133
R1
1K
Zo = 50 Ohm
VCC
R6
82.5
18pF
C5
0.1u
C3
10uF
+
-
U1
ICS843001
1
2
3
4
8
7
6
5
VCCA
VEE
XTAL_OUT
XTAL_IN
VCC
Q0
nQ0
FREQ_SEL
VCC
R3
133
R4
82.5
VCC
Zo = 50 Ohm
X1
26.5625MHz
R2
10
VCC
C2
33pF
PC BOARD LAYOUT EXAMPLE
Figure 3B shows an example of ICS843001 P.C. board layout.
The crystal X1 footprint shown in this example allows installation
of either surface mount HC49S or through-hole HC49 package.
The footprints of other components in this example are listed in
the
Table 6. There should be at least one decoupling capacitor
per power pin. The decoupling capacitors should be located as
close as possible to the power pins. The layout assumes that the
board has clean analog power ground plane.
TABLE 6. FOOTPRINT TABLE
e
c
n
e
r
e
f
e
Re
z
i
S
2
C
,
1
C2
0
4
0
3
C5
0
8
0
5
C
,
4
C3
0
6
0
2
R3
0
6
0
t
n
e
n
o
p
m
o
c
s
t
s
il
,
6
e
l
b
a
T
:
E
T
O
N
.
e
l
p
m
a
x
e
t
u
o
y
a
l
s
i
h
t
n
i
n
w
o
h
s
e
z
i
s
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