参数资料
型号: CS5381-KSZR
厂商: Cirrus Logic Inc
文件页数: 3/16页
文件大小: 0K
描述: IC ADC AUD 120DB 192KHZ 24-SOIC
标准包装: 1,000
位数: 24
采样率(每秒): 216k
数据接口: 串行
转换器数目: 2
功率耗散(最大): 445mW
电压电源: 模拟和数字
工作温度: -10°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 24-SOIC(0.295",7.50mm 宽)
供应商设备封装: 24-SOIC
包装: 带卷 (TR)
输入数目和类型: 2 个差分,单极
配用: 598-1592-ND - REFERENCE DESIGN CS5381 AUD ADC
598-1008-ND - BOARD EVAL FOR CS5381 192KHZ ADC
IDT / ICS 3.3V, 2.5V LVPECL CLOCK GENERATOR
11
ICS843031AG-01 REV. A NOVEMBER 11, 2008
ICS843031-01
FEMTOCLOCKS CRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
3. Calculations and Equations.
The purpose of this section is to derive the power dissipated into the load.
LVPECL output driver circuit and termination are shown in
Figure 6.
To calculate worst case power dissipation into the load, use the following equations which assume a 50
Ω load, and a termination
voltage of V
CC
– 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CC_MAX
– 0.9V
(V
CC_MAX
– V
OH_MAX
) = 0.9V
For logic low, V
OUT
= V
OL_MAX
= V
CC_MAX
– 1.7V
(V
CC_MAX
– V
OL_MAX
) = 1.7V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CC_MAX
– 2V))/R
L
] * (V
CC_MAX
– V
OH_MAX
) = [(2V – (V
CC_MAX
– V
OH_MAX
))/R
L
] * (V
CC_MAX
– V
OH_MAX
) =
[(2V – 0.9V)/50
Ω] * 0.9V = 19.8mW
Pd_L = [(V
OL_MAX
– (V
CC_MAX
– 2V))/R
L
] * (V
CC_MAX
– V
OL_MAX
) = [(2V – (V
CC_MAX
– V
OL_MAX
))/R
L
] * (V
CC_MAX
– V
OL_MAX
) =
[(2V – 1.7V)/50
Ω] * 1.7V = 10.2mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 30mW
FIGURE 6. LVPECL DRIVER CIRCUIT AND TERMINATION
Q1
V
OUT
V
CC
RL
50
V
CC - 2V
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