参数资料
| 型号： | CS5512-BSZ |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 11/26页 |
| 文件大小： | 0K |
| 描述： | IC ADC 20BIT EXTERNAL OSC 8-SOIC |
| 标准包装： | 100 |
| 位数： | 20 |
| 采样率（每秒）： | 326 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 2.5mW |
| 电压电源： | 双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 8-SOIC |
| 包装： | 管件 |
| 输入数目和类型： | 1 个差分，双极 |
CS5510/11/12/13
DS337F4
19
valid conversion due to the modified Sinc4 filter
characteristics.
2.5.5
Multiplexed Applications
The settling performance of the CS5510/11/12/13
in multiplexed applications is determined by the
Sinc4 filter. To settle, a step input requires 4 full
conversion cycles after the analog input has
switched. In this case, the throughput is reduced
by a factor of four as the first three conversions af-
ter the step is applied will not be fully settled.
If the application does not require the maximum
throughput possible from the ADC, the multiplexer
can be switched at any time. In this case, the sys-
tem must wait for at least five conversion cycles for
a fully-settled result from the ADC.
If maximum throughput is required in a multiplexed
application, the multiplexer must be switched at the
correct time during the data collection process. For
maximum throughput with the CS5510/12, switch-
ing of a multiplexer should occur 595 SCLK cycles
after SDO falls. For maximum throughput with the
CS5511/13, switching of a multiplexer should oc-
cur on the rising edge of SDO during a conversion
in which the data word is not read. The conversion
data that is immediately available when SDO falls
again is valid, and represents the analog input from
the previous multiplexer setting. The next three
conversions from the part will be unsettled values,
and the fourth conversion will represent a fully-set-
tled result from the new multiplexer setting. The
multiplexer should be switched again at the appro-
-140
-120
-100
-80
-60
-40
-20
0
020
40
60
80
100
120
Frequency (Hz)
M
a
gni
tu
d
e
(
d
B
)
47 Hz
63 Hz
CS5510/12
SCLK = 32.768 kHz
Figure 20. Digital Filter Response.
Frequency
(Hz)
Rejection
(dB)
Frequency
(Hz)
Rejection
(dB)
Frequency
(Hz)
Rejection
(dB)
Frequency
(Hz)
Rejection
(dB)
38
37
47
84
56
91
65
73
39
48
92
57
109
66
69
40
42
49
88
58
94
67
66
41
46
50
92
59
89
68
64
42
49
51
105
60
88
69
63
43
54
52
89
61
92
70
61
44
58
53
86
62
104
71
60
45
64
54
85
63
84
-
46
72
55
87
64
77
-
Table 4. Digital Filter Response at 32.768 kHz.
相关PDF资料 |
PDF描述 |
|---|---|
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| CS5528-ASZR | IC ADC 24BIT 8CH 24-SSOP |
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| CS5530-ISZR | IC ADC 24BIT 1CH W/LNA 20-SSOP |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CS5512-BSZR | 功能描述:模数转换器 - ADC IC 20-Bit 8-Pin Delta Sigma ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| CS5513 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:16-bit and 20-bit, 8-pin ΔΣ ADCs |
| CS5513-BS | 功能描述:模数转换器 - ADC 20-Bit Delta Sigma ADC Int. OSC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| CS5513-BSR | 功能描述:模数转换器 - ADC IC 20-Bit 8-Pin Delta Sigma ADC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| CS5513-BSZ | 功能描述:模数转换器 - ADC 20-Bit Delta Sigma ADC Int. OSC RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
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