参数资料
| 型号： | CS5528-ASZR |
| 厂商： | Cirrus Logic Inc |
| 文件页数： | 30/56页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT 8CH 24-SSOP |
| 标准包装： | 1,000 |
| 位数： | 24 |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 14.8mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 24-SSOP |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 8 个单端，单极；8 个单端，双极 |
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CS5521/22/23/24/28
36
DS317F8
SDO line.
If, during the first 8 SCLKs,
"00000000" is provided on SDI, the converter will
remain in this conversion mode, and continue to
perform conversions on the selected Setup. To exit
this conversion mode, "11111111" must be provid-
ed on SDI during the first 8 SCLKs. If the user de-
cides to exit, 24 more SCLKs are required to read
the final conversion word from the data register and
return to command mode.
1.4.1.3 Repeated One-Setup Conversions with
Wait
(LP = 1 MC = 0 RC = 1)
In this conversion mode, the ADC will repeatedly
perform conversions, referencing only one Setup.
The 8-bit command word contains the CSRP bits,
which instruct the converter which Setup to use
when performing the conversion. Note that in this
mode, every conversion word must be read. The
part will wait for the current conversion word to be
read before performing the next conversion.
To perform repeated, one-Setup conversions with
wait, the MC bit must be set to '0', the LP bit must
be set to '1', and the RC bit must be set to '1' in the
Configuration Register. Then, the 8-bit command
word that references the desired Setup must be sent
to the converter. The ADC will then begin per-
forming conversions on the referenced Setup, and
SDO will fall to indicate when a conversion is com-
plete, and data is available. Thirty-two SCLKs are
then needed to read the conversion word from the
data register. The first 8 SCLKs are used to clear
the SDO flag. During the last 24 SCLKs, the data
word will be output from the converter on the SDO
line. If, during the first 8 SCLKs, "00000000" is
provided on SDI, the converter will remain in this
conversion mode, and continue to perform conver-
sions on the selected Setup after each data word is
read. To exit this conversion mode, "1111 1111"
must be provided on SDI during the first 8 SCLKs.
If the user decides to exit, 24 more SCLKs are re-
quired to read the final conversion word from the
data register and return to command mode.
1.4.1.4 Single, Multiple-Setup Conversions
(LP = 0 MC = 1 RC = X)
In this conversion mode, the ADC will perform sin-
gle conversions, referencing multiple Setups, and
return to command mode after the data for all con-
versions have been read. The CSRP bits in the
command word are ignored in this mode. Instead,
the Depth Pointer (DP3-DP0) bits in the Configu-
ration Register are accessed to determine the num-
ber of Setups to reference when collecting the data.
The number of Setups referenced will be equal to
(DP3-DP0) + 1, and will be accessed in order, be-
ginning with Setup1.
To perform single, multiple-Setup conversions, the
MC bit must be set to '1', and the LP bit must be set
to '0' in the Configuration Register. Then, the 8-bit
command word to start a conversion must be sent
to the converter. Because the CSRP bits of the
command word are ignored in this mode, a "start
convert" command referencing any of the available
Setups will begin the conversions. The ADC will
then perform conversions using the appropriate
number of Setups (as dictated by the DP bits in the
Configuration Register), beginning with Setup1.
The SDO line will fall after the final conversion to
indicate that the data is ready. Eight SCLKs, plus
24 SCLKs for each Setup referenced are required to
read the conversion words from the data FIFO. The
first 8 SCLKs are used to clear the SDO flag. Ev-
ery 24 bits thereafter consist of the data words of
each Setup that was referenced, until all of the data
has been read from the part. The data word from
Setup1 is output first, followed by the data word
from Setup2, and so on for the appropriate number
of Setups. The part returns to command mode im-
mediately after the final data word has been read,
and waits for the next command to be issued.
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| CS5529_05 | 制造商:CIRRUS 制造商全称:Cirrus Logic 功能描述:16-bit, Programmable ΔΣ ADC with 6-bit Latch |
| CS5529-AP | 功能描述:模数转换器 - ADC Prgrmmbl Delta Sigma ADC w/6-Bit Lat-Ch RoHS:否 制造商:Texas Instruments 通道数量:2 结构:Sigma-Delta 转换速率:125 SPs to 8 KSPs 分辨率:24 bit 输入类型:Differential 信噪比:107 dB 接口类型:SPI 工作电源电压:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-32 |
| CS5529AS | 制造商:CIRRUS 功能描述:New |
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