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参数资料
| 型号： | CS7808-CM |
| 厂商： | CIRRUS LOGIC INC |
| 元件分类： | 消费家电 |
| 英文描述： | MULTI PURPOSE AUDIO/VIDEO EMBEDDED PROCESSOR |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP208 |
| 封装： | MQFP-208 |
| 文件页数： | 20/52页 |
| 文件大小： | 985K |
| 代理商： | CS7808-CM |
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CS7808
20
3.2.11
System Functions
208-pin PQFP packages
All I/O pins are 3 V with 5 V tolerance
Advanced 0.25 micron CMOS technology
Internal processors run at 81 MHz
Supports Low Power modes and clock shutoff
3.3
The CS7808 includes two powerful, proprietary
32-bit RISC processors, RISC0 and RISC1, with
optimizing C compiler support and source level de-
bugger. The RISC processors fully support many
Real Time Operation Systems (RTOS).
RISC Processor
In addition to being compatible with the standard
MIPS
R3000
instruction set, the RISC proces-
sors also havea MAC engine, which performs mul-
tiply/accumulate in 2 cycles in a pipelined fashion
with C support, effectively achieving single cycle
throughout.
3.4
The CS7808 contains a proprietary digital signal
processor (DSP), which is optimized for audio ap-
plications. The DSP performs 32-bit simple integer
operations, and has a 24-bit fixed point logic unit,
with a 54-bit accumulator. There are 32 general-
purpose registers, and eight independent address
generation registers, featuring: linear and circular
buffer operations, and dual operand read from
memory. The multiply-accumulator has single-cy-
cle throughput, with two cycle latency. The DSP is
optimized for bit packing and unpacking opera-
tions.Theinterfacetomainmemory isdesignedfor
handling flexible block sizes and skip counts.
DSP Processor
3.5
The DRAM Interface performs the SDRAM con-
trol and arbitration functions for all the other mod-
ules in the CS7808. The DRAM interface services
and arbitrates a number of clients and stores their
code and/or data within the local memory. This ar-
bitration and scheduling guarantees the allocation
of sufficient bandwidth to the various clients. The
DRAM Interface supports up to 32 Mbytes. For a
Memory Control
typical application, the CS7808 requires 8 Mbytes
memory space.
Sharing the same interface, CS7808 also supports
FLASHROM,OTP, ormaskROM interface. Code
is stored in ROM. After the system is booted, the
code is shadowed inside SDRAM for execution.
The FLASH ROM interface is provided so that the
code can be upgraded in the field once the commu-
nications channel is established (via modem port,
CD-R, or serial port). Utility software will be pro-
vided to debug and upgrade code for the system
manufacturer.
3.6
TheDMAcontrollermovesdatabetweentheexter-
nal memory and internal memory. The external
memory address can be specified using a register,
or in FIFO mode, using start and end address regis-
ters. Separate start/end address registers are used
for DMA read and write operations. The DMA in-
terface also has a block transfer function, which al-
lows for the transfer of one block of data from one
external memorylocation to anotherexternal mem-
ory location. In effect, this feature combines a
DMA read and write into one operation. In addi-
tion, the DMA write operation allows for byte,
short, word, and other types of masking.
Dataflow Control (DMA)
3.7
Thesystemcontrolfunctionsareusedtocoordinate
the activities of the multiple processors, and to pro-
vide the supporting system operations. Four 32-bit
communication registers are available for inter-
processor communication, and eight semaphore
registers are used for resource locking. Timers are
available for general-purpose functions, as well as
more specialized functions such as watchdog tim-
ers and performance monitoring.
System Control Functions
The large number of general purpose I/Os offers
flexibility in system configurations. An I
2
C master
allows for control of other I
2
C devices, such as a
video encoder. An I
2
C slave port shares the same
pins, and can be used for debug functions. Inter-
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