参数资料
| 型号： | CS8363YDPSR7G |
| 厂商： | ON Semiconductor |
| 文件页数： | 4/8页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 3.3V/ADJ D2PAK-7 |
| 标准包装： | 750 |
| 稳压器拓扑结构： | 正，固定式和可调式 |
| 输出电压： | 3.3V，可调式 |
| 输入电压： | 6 V ~ 26 V |
| 稳压器数量： | 2 |
| 电流 - 输出： | 100mA，250mA |
| 电流 - 限制（最小）： | 125mA，275mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-263-8，D²Pak（7 引线+接片），TO-263CA |
| 供应商设备封装： | D2PAK-7 |
| 包装： | 带卷 (TR) |
CS8363
PACKAGE PIN DESCRIPTION
PACKAGE PIN #
D 2 PAK ? 7
1
2
3
4
5
6
7
PIN SYMBOL
V STBY
V IN
V TRK
GND
Adj
ENABLE
RESET
FUNCTION
Standby output voltage delivering 100 mA.
Input voltage.
Tracking output voltage controlled by ENABLE delivering 250 mA.
Reference ground connection.
Resistor divider from V TRK to Adj. Sets the output voltage on V TRK . If tied to
V TRK , V TRK will track V STBY .
Provides on/off control of the tracking output, active LOW.
CMOS compatible output lead that goes low whenever V STBY falls out of
regulation.
CIRCUIT DESCRIPTION
ENABLE Function
The ENABLE function switches the output transistor for
V TRK on and off. When the ENABLE lead voltage exceeds
1.4 V (Typ), V TRK turns off. This input has several hundred
millivolts of hysteresis to prevent spurious output activity
during power ? up or power ? down.
RESET Function
The RESET is an open collector NPN transistor,
controlled by a low voltage detection circuit sensing the
V STBY (3.3 V) output voltage. This circuit guarantees the
RESET output stays below 1.0 V (0.1 V Typ) when V STBY
is as low as 1.0 V to ensure reliable operation of
microprocessor ? based systems.
V TRK Output Voltage
This output uses the same type of output device as V STBY ,
but is rated for 250 mA. The output is configured as a
tracking regulator of the standby output. By using the
standby output as a voltage reference, giving the user an
external programming lead (Adj lead), output voltages from
3.3 V to 20 V are easily realized. The programming is done
with a simple resistor divider, and following the formula:
VTRK + VSTBY (1 ) R1 R2) ) IAdj R1
If another 3.3 V output is needed, simply connect the Adj
lead to the V TRK output lead.
B+
C1*
0.1 m F
V IN
V STBY
CS8363
RESET
R3
3.3 V, 100 mA
C2**
10 m F
ESR < 8.0 W
V DD
MCU
RESET
ENABLE
Adj
R2
I/O
GND
V TRK
R1
C3**
SW 5.0 V,
250 mA
GND
10 m F
ESR < 8.0 W
V TRK ～ V STBY (1 + R1/R2)
For V TRK ～ 5.0 V, R1/R2 ～ 0.5
*C1 is required if regulator is located far from power supply filter.
**C2 and C3 are required for stability.
Figure 2. Test and Application Circuit, 3.3 V, 5.0 V Regulator
http://onsemi.com
4
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