参数资料
| 型号： | CS8391YDPR5 |
| 厂商： | ON Semiconductor |
| 文件页数： | 5/6页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 5V .25A/.1A D2PAK-5 |
| 产品变化通告： | Product Obsolescence 30/Dec/2003 |
| 标准包装： | 750 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 5V |
| 输入电压： | 6 V ~ 26 V |
| 电压 - 压降（标准）： | 0.4V @ 250mA，0.4V @ 100mA |
| 稳压器数量： | 2 |
| 电流 - 输出： | 250mA，100mA |
| 电流 - 限制（最小）： | 260mA，105mA |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | TO-263-6，D²Pak（5 引线+接片），TO-263BA |
| 供应商设备封装： | D2PAK-5 |
| 包装： | 带卷 (TR) |
| 其它名称： | CS8391YDPR5OS |
CS8391
ENABLE
The ENABLE function controls V OUT1 . When ENABLE
is high, V OUT1 is on. When ENABLE is low, V OUT1 is off.
Calculating Power Dissipation in a
Dual Output Linear Regulator
The maximum power dissipation for a dual output
V IN
I IN
SMART
REGULATOR
Control
Features
I OUT1
I OUT2
V OUT1
V OUT2
regulator (Figure 3) is
R Q JA + R Q JC ) R Q CS ) R Q SA
PD(max) + VIN(max) * VOUT1(min) IOUT1(max) )
VIN(max) * VOUT2(min) IOUT2(max) ) VIN(max)IQ (1)
where:
V IN(max) is the maximum input voltage,
V OUT1(min) is the minimum output voltage from V OUT1 ,
V OUT2(min) is the minimum output voltage from V OUT2 ,
I OUT1(max) is the maximum output current, for the
application,
I OUT2(max) is the maximum output current, for the
application, and
I Q is the quiescent current the regulator consumes at both
I OUT1(max) and I OUT2(max) .
Once the value of P D(max) is known, the maximum
permissible value of R q JA can be calculated:
I Q
Figure 3. Dual Output Regulator With Key
Performance Parameters Labeled.
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R q JA :
(3)
R Q JA +
150 ° C * TA
PD
(2)
where:
R q JC = the junction?to?case thermal resistance,
The value of R q JA can be compared with those in the
package section of the data sheet. Those packages with
R q JA ’s less than the calculated value in equation 2 will keep
the die temperature below 150 ° C.
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external heat
sink will be required.
R q CS = the case?to?heat sink thermal resistance, and
R q SA = the heat sink?to?ambient thermal resistance.
R q JC appears in the package section of the data sheet. Like
R q JA , it too is a function of package type. R q CS and R q SA are
functions of the package type, heatsink and the interface
between them. These values appear in heat sink data sheets
of heat sink manufacturers.
V IN
V OUT2
V CC
V BATT
0.1 m F
C 1 *
CS8391
C 2 **
22 m F
ESR < 8 W
m P
V OUT1
22 m F
ESR < 8 W
C 3 **
Load
GND
ENABLE
I/O
GND
* C 1 required if regulator is located far from power supply filter.
** C 2 and C 3 required for stability. Capacitor must operate at minimum temperature expected during system operations.
Figure 4. Test & Application Circuit
http://onsemi.com
5
相关PDF资料 |
PDF描述 |
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| D-150-0095 | CONN SPLICE BUTT BLUE/YELLOW |
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| D-150-0238 | CONN SPLICE BUTT 12-14AWG YLW |
| D-200-84 | CONN SPLICE BUTT 12-16AWG YELLOW |
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