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参数资料
| 型号： | CY2071ASL |
| 厂商： | Cypress Semiconductor Corp. |
| 英文描述： | Single-PLL General-Purpose EPROM Programmable Clock Generator |
| 中文描述： | 单锁相环通用EPROM的可编程时钟发生器 |
| 文件页数： | 3/8页 |
| 文件大小： | 118K |
| 代理商： | CY2071ASL |
CY2071A
Document #: 38-07139 Rev. *A
Page 3 of 8
Operating Conditions
[3]
Parameter
V
DD
V
DD
T
A
Description
Min.
4.5
3.0
0
–
40
Max.
5.5
3.6
70
85
25
15
25.0
30.0
50
Unit
V
V
°
C
°
C
pF
pF
MHz
MHz
ms
Supply Voltage, 5.0V Operation
Supply Voltage, 3.3V Operation
Commercial Operating Temperature, Ambient
Industrial Operating Temperature, Ambient
Max. Load Capacitance per Output (5V Operation)
Max. Load Capacitance per Output (3.3V Operation)
External Reference Crystal
External Reference Clock
[4, 5]
Power-up time for all VDD's to reach minimum specified voltage (power
ramps must be monotonic)
C
L
f
REF
10.0
1.0
0.05
t
PU
Electrical Characteristics,
Commercial 5.0V
V
DD
= 5V ±10%, T
A
= 0
°
C to +70
°
C
Parameter
Description
V
OH
HIGH-Level Output Voltage
I
OH
=
–
4.0 mA
V
OL
LOW-Level Output Voltage
I
OL
= 4.0 mA
V
IH
Except Crystal Pins
V
IL
Except Crystal Pins
I
IH
Input HIGH Current
V
IN
= V
DD
–
0.5V
I
IL
Input LOW Current
V
IN
= 0.5V
I
OZ
Output Leakage Current
Three State Outputs
I
DD
V
DD
= V
DD
max. 5V operation, C
L
= 25 pF
Conditions
Min.
2.4
Typ.
Max.
Unit
V
V
V
V
μ
A
μ
A
μ
A
mA
0.4
HIGH-Level Input Voltage
[6]
LOW-Level Output Voltage
[6]
2.0
0.8
10
150
250
60
V
DD
Supply Current
[7]
40
Electrical Characteristics,
Commercial 3.3V
V
DD
= 3.3V ±10%, T
A
= 0
°
C to +70
°
C
Parameter
Description
V
OH
HIGH-Level Output Voltage
I
OH
=
–
4.0 mA
V
OL
LOW-Level Output Voltage
I
OL
= 4.0 mA
V
IH
Except Crystal Pins
V
IL
Except Crystal Pins
I
IH
Input HIGH Current
V
IN
= V
DD
–
0.5V
I
IL
Input LOW Current
V
IN
= 0.5V
I
OZ
Output Leakage Current
Three State Outputs
I
DD
V
DD
= V
DD
max. 3.3V operation,
C
L
=
15 pF
Notes:
3.
Electrical parameters are guaranteed with these operating conditions. Values for 3.3V operation are shown in parentheses.
4.
External input reference clock must have a duty cycle between 40% and 60%, measured at V
/2.
5.
Please refer to application note
“
Crystal Oscillator Topics
”
for information on AC-coupling the external input reference clock.
6.
Xtal inputs have CMOS thresholds.
7.
Load = max, typical configuration, f
= 14.318 MHz. Specific configurations may vary. A close approximation of I
can be derived by the following formula:
I
DD
(mA) = V
DD
*(6.25+(0.055*F
REF
) + (0.0017*C
LOAD
*(F
CLKA
+F
CLKB
+F
CLKC
))). C
LOAD
is specified in pF and F is specified in MHz.
Conditions
Min.
2.4
Typ.
Max.
Unit
V
V
V
V
μ
A
μ
A
μ
A
mA
0.4
HIGH-Level Input Voltage
[6]
LOW-Level Output Voltage
[6]
2.0
0.8
10
150
250
40
V
DD
Supply Current
[7]
24
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相关代理商/技术参数 |
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|---|---|
| CY2071ASL-397 | 制造商:Cypress Semiconductor 功能描述: |
| CY2071ASL-528 | 制造商:Cypress Semiconductor 功能描述: |
| CY2071ASL-619 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Cypress Semiconductor 功能描述: |
| CY2071ASL-623 | 制造商:Cypress Semiconductor 功能描述: |
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