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参数资料
| 型号： | CY2215 |
| 厂商： | Cypress Semiconductor Corp. |
| 英文描述： | 133-MHz Spread Spectrum Frequency Timing Generator(133MHz 宽频谱定时发生器) |
| 中文描述： | 133 - MHz的扩频频率定时发生器（133MHz的宽频谱定时发生器） |
| 文件页数： | 3/8页 |
| 文件大小： | 108K |
| 代理商： | CY2215 |
CY2215
PRELIMINARY
3
Actual Clock Frequency Values
Note:
3.
TCLK is a test clock driven in on the XTALIN input in test mode.
Function Table
SEL133
SEL1
SEL0
CPUCLK
(MHz)
CPUCLK/2
(MHz)
66CLK
(MHz)
PCICLK
(MHz)
48CLK
(MHz)
REFCLK
(MHz)
IOAPIC
(MHz)
0
0
0
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
0
0
1
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0
1
0
100
50
66.67
33.33
OFF
14.318
16.67
0
1
1
100
50
66.67
33.33
48
14.318
16.67
1
0
0
TCLK/2
TCLK/4
TCLK/4
TCLK/8
TCLK/2
TCLK
TCLK/16
1
0
1
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
1
0
133.33
66.67
66.67
33.33
OFF
14.318
16.67
1
1
1
133.33
66.67
66.67
33.33
48
14.318
16.67
Clock Output
Target
Frequency
(MHz)
Actual
Frequency
(MHz)
PPM
CPUCLK
100.0
TBD
TBD
CPUCLK
133.33
TBD
TBD
48CLK
48.0
48.008
167
Clock Enable Configuration
PWR_DWN
All Clocks
OSC.
VCOs
0
LOW
OFF
OFF
1
ON
ON
ON
Clock Driver Impedances
Buffer Name
V
DD
Range
2.375 - 2.625
Buffer Type
Impedance
Typical
29
Minimum
13.5
Maximum
45
CPU, CPU/2, IOAPIC
Type 1
48CLK, REF
3.135 - 3.465
Type 3
20
40
60
PCI, 66CLK
3.135 - 3.465
Type 5
12
30
55
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