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参数资料
| 型号： | CY22388 |
| 厂商： | Cypress Semiconductor Corp. |
| 英文描述： | Factory Programmable Quad PLL Clock Generator with VCXO(带VCXO的可编程方形PLL时钟发生器) |
| 中文描述： | 四工厂可编程锁相环时钟发生器，石英振荡器（带石英振荡器的可编程方形锁相环时钟发生器） |
| 文件页数： | 4/10页 |
| 文件大小： | 552K |
| 代理商： | CY22388 |
CY22388/89/91
Document #: 38-07734 Rev. *B
Page 4 of 10
Analog VCXO
There are three programmable reference operating modes for
the CY22388/89/91 family of devices. The first mode utilizes
an external pullable crystal and incorporates an internal
Analog VCXO.
The second mode configures the internal crystal oscillator to
accept an external driven reference source from 1 to 100 MHz.
The input capacitance on the XIN PIN when driven in this
mode is 15 pF.
The third mode disables the VCXO input control and sets the
internal oscillator to a fixed frequency operation. The load
capacitance seen by the external crystal when connected to
PINS XIN and XOUT is equal to 12 pF.
One of the key components to the CY22388/89/91 family of
devices is the analog VCXO. The VCXO is used to “pull” the
reference crystal higher or lower in order to lock the system
frequency to an external source. This is ideal for applications
where the output frequency needs to track along with an
external reference frequency that is constantly shifting.
The VCXO is completely analog, so there is infinite resolution
on the VCXO pull curve. The Analog to Digital Converter steps
that are normally associated with a digital VCXO input is not
present in this device. A special pullable crystal must be used
to in order to have adequate VCXO pullrange. Pullable Crystal
specifications are included in this data sheet.
Please refer to the CY22388/89/91 Application Note for
pullable crystal recommendations outside of the standard
industry frequencies given in the Pullable Crystal Specifica-
tions.
VCXO Profile
Figure 2
shows an example of what a VCXO profile looks like.
The analog voltage input is on the X-axis and the PPM range
is on the Y-axis. An increase in the VCXO input voltage results
in a corresponding increase in the output frequency. This has
the effect of moving the PPM from a negative to positive offset.
Figure 2. VCXO Profile
.
-200
-150
-100
-50
0
50
100
150
200
0
0.5
1
1.5
2
2.5
3
3.5
VCXO input [V]
T
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CY22388_06 | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Factory Programmable Quad PLL Clock Generator with VCXO |
| CY22388FZXC | 功能描述:时钟发生器及支持产品 4PLL CLK GENRATR COM RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| CY22388FZXCT | 功能描述:时钟发生器及支持产品 3 PLL Clk Syn COM RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| CY22388KZXC-11 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY22388KZXC-13 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
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