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| 型号： | CY22394 |
| 厂商： | Cypress Semiconductor Corp. |
| 元件分类： | 8位微控制器 |
| 英文描述： | -bit AVR Microcontroller with 8K Bytes In- System Programmable Flash |
| 中文描述： | 位AVR微控制器具有8K字节的系统内可编程闪存 |
| 文件页数： | 13/19页 |
| 文件大小： | 246K |
| 代理商： | CY22394 |
CY22393
CY22394
CY22395
Document #: 38-07186 Rev. *B
Page 13 of 19
3.3V Switching Characteristics
Parameter
1/t
1
Description
Output Frequency
[4, 6]
Conditions
Min.
Typ.
Max.
200
166
400
Unit
MHz
MHz
MHz
Clock output limit, CMOS, Commercial
Clock output limit, CMOS, Industrial
Clock output limit, PECL, Commercial (CY22394
only)
Clock output limit, PECL, Industrial (CY22394
only)
Duty cycle for outputs, defined as t
2
3 t
1
,
Fout<100 MHz, divider>=2,
measured at V
DD
/2
Duty cycle for outputs, defined as t
2
3 t
1
,
Fout>100 MHz or divider = 1,
measured at V
DD
/2
Output clock rise time, 20% to 80% of V
DD
100
125
375
MHz
t
2
Output Duty Cycle
[4, 7]
45%
50%
55%
40%
50%
60%
t
3
Rising Edge Slew
Rate
[4]
Falling Edge Slew
Rate
[4]
Output three-state
Timing
[4]
Clock Jitter
[4, 8]
0.75
1.4
V/ns
t
4
Output clock fall time, 20% to 80% of V
DD
0.75
1.4
V/ns
t
5
Time for output to enter or leave three-state
mode after SHUTDOWN/OE switches
Peak-to-peak period jitter, CLK outputs
measured at V
DD
/2
150
300
ns
t
6
400
ps
v
7
P+/P– Crossing Point
[4]
Crossing point referenced to Vdd/2, balanced
resistor network (CY22394 only)
P+/P– Jitter
[4, 8]
Peak-to-peak period jitter, P+/P– outputs
measured at crossing point (CY22394 only)
Lock Time
[4]
PLL Lock Time from Power-up
–0.2
0
0.2
V
t
8
200
ps
t
9
1.0
3
ms
2.5V Switching Characteristics
(CY22395 only)
[5]
Parameter
1/t
1_2.5
t
2_2.5
Description
Conditions
Min.
Typ.
Max.
133
60%
Unit
MHz
Output Frequency
[4, 6]
Output Duty Cycle
[4, 7]
Clock output limit, LVCMOS
Duty cycle for outputs, defined as t
2
÷
t
1
measured at LV
DD
/2
Output clock rise time, 20% to 80% of LV
DD
40%
50%
t
3_2.5
t
4_2.5
Rising Edge Slew Rate
[4]
Falling Edge Slew Rate
[4]
Output clock fall time, 20% to 80% of LV
DD
0.5
0.5
1.0
1.0
V/ns
V/ns
Switching Waveforms
Notes:
6. Guaranteed to meet 20%–80% output thresholds, duty cycle, and crossing point specifications.
7. Reference Output duty cycle depends on XTALIN duty cycle.
8. Jitter varies significantly with configuration. Reference Output jitter depends on XTALIN jitter and edge rate.
t
1
OUTPUT
t
2
t
3
t
4
All Outputs, Duty Cycle and Rise/Fall Time
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相关代理商/技术参数 |
参数描述 |
|---|---|
| CY22394FC | 功能描述:锁相环 - PLL 3-PLL Clk Syn COM RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
| CY22394FCT | 制造商:Rochester Electronics LLC 功能描述: 制造商:Cypress Semiconductor 功能描述: |
| CY22394FI | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Three-PLL Serial-Programmable Flash-Programmable Clock Generator |
| CY22394FIT | 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:Three-PLL Serial-Programmable Flash-Programmable Clock Generator |
| CY22394FXC | 功能描述:锁相环 - PLL 3-PLL Clk Syn COM RoHS:否 制造商:Silicon Labs 类型:PLL Clock Multiplier 电路数量:1 最大输入频率:710 MHz 最小输入频率:0.002 MHz 输出频率范围:0.002 MHz to 808 MHz 电源电压-最大:3.63 V 电源电压-最小:1.71 V 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:QFN-36 封装:Tray |
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