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参数资料
| 型号： | CY2254 |
| 厂商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分类： | XO, clock |
| 英文描述： | Two-PLL Clock Generator(二锁相环时钟发生器) |
| 中文描述： | 66.66 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封装： | 0.300 INCH, PLASTIC, SOIC-28 |
| 文件页数： | 2/3页 |
| 文件大小： | 54K |
| 代理商： | CY2254 |
Understanding the CY2254
2
Both CPU and PCI clock outputs feature:
Matched impedances on the rising and falling edges of
output drivers resulting in equal rise and fall times
Low output impedance: 25
(typical) and 40
(maximum),
measured at 1.5V
Max. Load on CPU clock = 20 pF
Max. Load on PCI clock = 30 pF
Reference Clock Outputs
The CY2254 buffers two clock outputs at the reference fre-
quency of 14.318 MHz. The REF0 output has a larger drive
capability of 30 pF, as compared to the REF1 drive capability
of 15 pF.
Keyboard and Floppy Clocks
The SYS PLL generates the Keyboard and Floppy clocks at
12 and 24 MHz respectively. Both these outputs are capable
of driving 20-pF loads, with low jitter.
Test Mode Support
The CY2254 supports the Triton Test mode when both S1 and
S0 are set to a logic HIGH. In this mode, reference frequency
(TCLK), applied to the XTALIN input, is buffered onto the
REF0 and REF1 outputs. The CY2254 also generates
TCLK/2, TCLK/4, TCLK/4, TCLK/8 frequencies on the CPU,
PCI, Floppy, and Keyboard clock outputs respectively.
Power Supply
The CY2254 requires a clean and accurate 3.3-Volt (
±
5%)
power supply for proper operation.
Reference Frequency
Cypress recommends the use of a parallel-resonant
14.318-MHz crystal to generate the most accurate clock out-
puts. A series-resonant crystal will result in clock outputs of a
slightly higher frequency (appx. 5%).
System Applications
The CY2254 was primarily designed to meet the clock re-
quirements of the Intel Triton chipset. However, since it is a
Pentium-compatible device, it can be used in any mother-
board requiring high-drive CPU and PCI clock outputs.
The CY2254 will provide accurate, low-jitter clocks on its out-
put. To ensure the quality of the clock outputs, a noise-free
power supply is necessary. Additionally, the user should fol-
low the high-speed design techniques summarized in the fol-
lowing sections to ensure reliable operation of the CY2254
and the board. For more details on these techniques, please
refer to the Application Notes, “System Design Consider-
ations” and “Protection, Decoupling, and Filtering of Cypress
CMOS Circuits,” both of which are available in the latest edi-
tion of the Cypress Applications Handbook. Please contact
your local Cypress representative for a copy.
Supply Bypass and Filtering
To ensure low jitter on the outputs of the CY2254, the design-
er must provide a clean source of power. A large tantalum
capacitor (10–1000
μ
F) attached to the board power supply
will prevent a fall in voltage caused by current surges, as well
as reduce power supply ripple. Attach this capacitor as close
as possible to where the V
dd
and GND signals enter the PCB.
This large capacitor will, however, be ineffective at very high
frequencies. Hence, a small capacitor, 0.1
μ
F, will be required
to filter high-frequency noise. Cypress recommends attach-
ing a 0.1-
μ
F ceramic capacitor on every V
dd
pinof the
CY2254. These capacitors must be attached as close to the
pins as is physically possible. Surface mount capacitors are
preferred because they have lower lead inductance.
Figure 2 shows the external capacitor connections.
Series Terminations
If the output of the CY2254 drives multiple loads or long trac-
es, use a terminating resistor in series with the output, at-
tached as close to the output pin as is possible. Figure 2
shows a 22
resistor in series with the output. The value of
this resistor, summed with the output impedance of the
CY2254, should equal the characteristic impedance of the
trace (transmission line). Typical values of the series resistor
range from 10
to 75
.
A resistor in series with the output dampens the voltage re-
flections which occur with output impedance mismatches. It
has the ultimate effect of reducing jitter on the output of the
CY2254. Once again, surface mount resistors are preferred
because of their lower lead inductance.
Table 1. CY2254 Function Table
OE
S0
S1
XTALIN Input
PCLK
BCLK
Ref. Clock
Output
24 MHz
12 MHz
0
X
X
14.318 MHz
High-Z
High-Z
High-Z
High-Z
High-Z
1
0
0
14.318 MHz
50 MHz
PCLK/2
14.318 MHz
24 MHz
12 MHz
1
0
1
14.318 MHz
60 MHz
PCLK/2
14.318 MHz
24 MHz
12 MHz
1
1
0
14.318 MHz
66 MHz
PCLK/2
14.318 MHz
24 MHz
12 MHz
1
1
1
TCLK
TCLK/2
TCLK/4
TCLK
TCLK/4
TCLK/8
相关PDF资料 |
PDF描述 |
|---|---|
| CY2256 | Pentium and Cyrix 6x86 Compatible Clock Synthesizer/Driver for OPTi Viper Chipset(应用于 OPTi Viper芯片组的奔腾和 Cyrix公司 6x86兼容的时钟合成器/驱动器) |
| CY2273A | Pentium㈢/II, 6x86, K6 Clock Synthesizer/Driver for Desktop PCs with Intel 82430TX, 82440LX or ALI IV/IV+, AGP and 3 DIMMs |
| CY2273A-1 | Pentium㈢/II, 6x86, K6 Clock Synthesizer/Driver for Desktop PCs with Intel 82430TX, 82440LX or ALI IV/IV+, AGP and 3 DIMMs |
| CY2273A-2 | Pentium㈢/II, 6x86, K6 Clock Synthesizer/Driver for Desktop PCs with Intel 82430TX, 82440LX or ALI IV/IV+, AGP and 3 DIMMs |
| CY2273A-3 | Pentium㈢/II, 6x86, K6 Clock Synthesizer/Driver for Desktop PCs with Intel 82430TX, 82440LX or ALI IV/IV+, AGP and 3 DIMMs |
相关代理商/技术参数 |
参数描述 |
|---|---|
| CY2254A | 制造商:SPECTRALINEAR 制造商全称:SPECTRALINEAR 功能描述:Pentium㈢ Processor Compatible Clock Synthesizer/Driver |
| CY2254ASC-1 | 制造商:Rochester Electronics LLC 功能描述:PENTIUM COMPATIBLE CLOCK GENERATOR/DRIVER - Bulk |
| CY2254ASC-1T | 制造商:Cypress Semiconductor 功能描述:Pentium Processor Compatible 28-Pin SOIC T/R 制造商:Rochester Electronics LLC 功能描述:PENTIUM COMPATIBLE CLOCK GENERATOR/DRIVER - Tape and Reel |
| CY2254ASC-2 | 制造商:Cypress Semiconductor 功能描述:Pentium Processor Compatible 28-Pin SOIC |
| CY2255 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:CPU System Clock Generator |
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