参数资料
型号: CY39200V388-181NTI
厂商: Cypress Semiconductor Corp.
英文描述: CPLDs at FPGA Densities
中文描述: CPLD器件在FPGA的密度
文件页数: 29/86页
文件大小: 1235K
代理商: CY39200V388-181NTI
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 29 of 86
Switching Waveforms
(continued)
Cluster Memory Output Register Timing (Asynchronous Inputs)
ADDRESS
t
CLMCYC2
t
CLMDV2
WRITE
ENABLE
INPUT
GLOBAL CLOCK
(OUTPUT REGISTER)
REGISTERED
OUTPUT
Cluster Memory Output Register Timing (Synchronous Inputs)
ADDRESS
t
CLMDV2
WRITE
ENABLE
GLOBAL CLOCK
(OUTPUT REGISTER)
REGISTERED
OUTPUT
(INPUT REGISTER)
GLOBAL CLOCK
t
CLMCYC2
t
CLMS
t
CLMH
INPUT
相关PDF资料
PDF描述
CY39200V388-200BBC CPLDs at FPGA Densities
CY39200V388-200BBI CPLDs at FPGA Densities
CY39200V388-200BGC CPLDs at FPGA Densities
CY39200V388-200BGI CPLDs at FPGA Densities
CY39200V388-200MBC CPLDs at FPGA Densities
相关代理商/技术参数
参数描述
CY39200V388-233MGC 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V388-233MGI 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V388-233NTC 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39200V388-83MGC 制造商:Cypress Semiconductor 功能描述:
CY39200V484-125BBC 制造商:CYPRESS 制造商全称:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities