参数资料
型号: CY7C0251-25AC
英文描述: SRAM|8KX18|CMOS|QFP|100PIN|PLASTIC
中文描述: 静态存储器| 8KX18 |的CMOS | QFP封装| 100引脚|塑料
文件页数: 5/20页
文件大小: 301K
代理商: CY7C0251-25AC
CY7C138AV/144AV/006AV
CY7C139AV/145AV/016AV
CY7C007AV/017AV
Document #: 38-06051 Rev. *A
Page 13 of 20
Note:
42. If tPS is violated, the busy signal will be asserted on one side or the other, but there is no guarantee to which side BUSY will be asserted.
Switching Waveforms (continued)
ADDRESS MATCH
tPS
tBLC
tBHC
ADDRESS MATCH
tPS
tBLC
tBHC
CER ValidFirst:
ADDRESS L,R
BUSYR
CEL
CER
BUSYL
CER
CE L
ADDRESS L,R
Busy Timing Diagram No. 1 (CE Arbitration)[42]
CELValid First:
ADDRESS MATCH
tPS
ADDRESS L
BUSY R
ADDRESS MISMATCH
tRC or tWC
tBLA
tBHA
ADDRESSR
ADDRESS MATCH
ADDRESS MISMATCH
tPS
ADDRESSL
BUSY L
tRC or tWC
tBLA
tBHA
ADDRESSR
Right Address Valid First:
Busy Timing Diagram No. 2 (Address Arbitration)[42]
Left Address Valid First
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