参数资料
型号: CY7C166-15VC
厂商: CYPRESS SEMICONDUCTOR CORP
元件分类: SRAM
英文描述: 16K x 4 Static RAM
中文描述: 16K X 4 STANDARD SRAM, 15 ns, PDSO24
封装: 0.300 INCH, MO-088, SOJ-24
文件页数: 1/12页
文件大小: 525K
代理商: CY7C166-15VC
CY7C166
16 K × 4 Static RAM
Cypress Semiconductor Corporation
198 Champion Court
San Jose
, CA 95134-1709
408-943-2600
Document #: 38-05025 Rev. *C
Revised November 29, 2010
16 K × 4 Static RAM
Features
High speed
15 ns
Output enable (OE) feature
CMOS for optimum speed/power
Low active power
633 mW
Low standby power
110 mW
TTL-compatible inputs and outputs
Automatic power-down when deselected
Functional Description
The CY7C166 is a high-performance CMOS static RAMs
organized as 16,384 by 4 bits. Easy memory expansion is
provided by an active LOW Chip Enable (CE) and tri-state
drivers. The CY7C166 has an active LOW Output Enable (OE)
feature. This device has an automatic power-down feature,
reducing the power consumption by 65% when deselected.
Writing to the device is accomplished when the Chip Enable (CE)
and Write Enable (WE) inputs are both LOW (and the Output
Enable (OE) is LOW). Data on the four input/output pins (I/O0
through I/O3) is written into the memory location specified on the
address pins (A0 through A13).
Reading the device is accomplished by taking Chip Enable (CE)
LOW (and OE LOW), while Write Enable (WE) remains HIGH.
Under these conditions the contents of the memory location
specified on the address pins will appear on the four data I/O
pins.
The I/O pins stay in a high-impedance state when Chip Enable
(CE) is HIGH (or Output Enable (OE) is HIGH). A die coat is used
to insure alpha immunity.
ARRAY
A1
A2
A3
A4
A5
A6
A7
A8
A
0
A
9
A
11
A
10
A
12
A
13
COLUMN
DECODER
ROW
DECODER
SENSE
AMPS
INPUT BUFFER
POWER
DOWN
WE
(OE)
I/O3
CE
I/O2
I/O1
I/O0
16K x 4
Logic Block Diagram
相关PDF资料
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相关代理商/技术参数
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